Praveen Raghavan

Publication Activity (10 Years)

Years Active: 2005-2019
Publications (10 Years): 26

Top Venues

ICICDT

DATE

DSD

ISQED

Publications

Behzad Zeinali, Jens Kargaard Madsen, Praveen Raghavan, Farshad Moradi
A Novel Nondestructive Bit-Line Discharging Scheme for Deep Submicrometer STT-RAMs. IEEE Trans. Emerg. Top. Comput. 7 (2) (2019)
Kan Xu, Ravi Patel, Praveen Raghavan, Eby G. Friedman
Exploratory design of on-chip power delivery for 14, 10, and 7 nm and beyond FinFET ICs. Integr. 61 (2018)
Raf Appeltans, Praveen Raghavan, Gouri Sankar Kar, Arnaud Furnémont, Liesbet Van der Perre, Wim Dehaene
A Smaller, Faster, and More Energy-Efficient Complementary STT-MRAM Cell Uses Three Transistors and a Ground Grid: More Is Actually Less. IEEE Trans. Very Large Scale Integr. Syst. 25 (4) (2017)
Behzad Zeinali, Jens Kargaard Madsen, Praveen Raghavan, Farshad Moradi
Ultra-Fast SOT-MRAM Cell with STT Current for Deterministic Switching. ICCD (2017)
Behzad Zeinali, Jens Kargaard Madsen, Praveen Raghavan, Farshad Moradi
Low-leakage sub-threshold 9 T-SRAM cell in 14-nm FinFET technology. Int. J. Circuit Theory Appl. 45 (11) (2017)
Luca Mattii, Dragomir Milojevic, Peter Debacker, Yasser Sherazi, Mladen Berekovic, Praveen Raghavan
IR-drop aware Design & technology co-optimization for N5 node with different device and cell height options. ICCAD (2017)
Innocent Agbo, Mottaqiallah Taouil, Daniel Kraak, Said Hamdioui, Halil Kukner, Pieter Weckx, Praveen Raghavan, Francky Catthoor
Integral Impact of BTI, PVT Variation, and Workload on SRAM Sense Amplifier. IEEE Trans. Very Large Scale Integr. Syst. 25 (4) (2017)
Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Dmitry Yakimets, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene
Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7. ESSDERC (2017)
Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene
Dedicated technology threshold voltage tuning for 6T SRAM beyond N7. ICICDT (2017)
Yibo Lin, Peter Debacker, Darko Trivkovic, Ryoung-Han Kim, Praveen Raghavan, David Z. Pan
Patterning Aware Design Optimization of Selective Etching in N5 and Beyond. ICCD (2017)
Odysseas Zografos, A. De Meester, Eleonora Testa, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Luca Gaetano Amarù, Praveen Raghavan, Francky Catthoor, Rudy Lauwereins
Wave pipelining for majority-based beyond-CMOS technologies. DATE (2017)
Peter Debacker, Kwangsoo Han, Andrew B. Kahng, Hyein Lee, Praveen Raghavan, Lutong Wang
MILP-Based Optimization of 2-D Block Masks for Timing-Aware Dummy Segment Removal in Self-Aligned Multiple Patterning Layouts. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (7) (2017)
Tarun Agarwal, Bart Soree, Iuliana P. Radu, Praveen Raghavan, Gianluca Fiori, Marc M. Heyns, Wim Dehaene
Material selection and device design guidelines for two-dimensional materials based TFETs. ESSDERC (2017)
Peter Debacker, Kwangsoo Han, Andrew B. Kahng, Hyein Lee, Praveen Raghavan, Lutong Wang
Vertical M1 Routing-Aware Detailed Placement for Congestion and Wirelength Reduction in Sub-10nm Nodes. DAC (2017)
Odysseas Zografos, Sourav Dutta, Mauricio Manfrini, Adrien Vaysset, Bart Sorée, Azad Naeemi, Praveen Raghavan, Rudy Lauwereins, Iuliana P. Radu
Non-volatile spin wave majority gate at the nanoscale. CoRR (2016)
Ravi Patel, Eby G. Friedman, Praveen Raghavan
Power noise in 14, 10, and 7 nm FinFET CMOS technologies. ISCAS (2016)
Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Praveen Raghavan, Francky Catthoor
Comparative BTI analysis for various sense amplifier designs. DDECS (2016)
Dimitrios Stamoulis, Simone Corbetta, Dimitrios Rodopoulos, Pieter Weckx, Peter Debacker, Brett H. Meyer, Ben Kaczer, Praveen Raghavan, Dimitrios Soudris, Francky Catthoor, Zeljko Zilic
Capturing True Workload Dependency of BTI-induced Degradation in CPU Components. ACM Great Lakes Symposium on VLSI (2016)
Eleonora Testa, Mathias Soeken, Odysseas Zografos, Luca Gaetano Amarù, Praveen Raghavan, Rudy Lauwereins, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Inversion optimization in Majority-Inverter Graphs. NANOARCH (2016)
Praveen Raghavan, Marie Garcia Bardon, Peter Debacker, P. Schuddinck, Doyoung Jang, Rogier Baert, Diederik Verkest, Aaron Voon-Yew Thean
5nm: Has the time for a device change come? ISQED (2016)
Victor Huang, Chenyun Pan, Dmitry Yakimets, Praveen Raghavan, Azad Naeemi
Device/system performance modeling of stacked lateral NWFET logic. ISQED (2016)
Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Diederik Verkest, Aaron Thean, Sung Kyu Lim
Physical Design Solutions to Tackle FEOL/BEOL Degradation in Gate-level Monolithic 3D ICs. ISLPED (2016)
Ravi Patel, Kan Xu, Eby G. Friedman, Praveen Raghavan
Exploratory Power Noise Models of Standard Cell 14, 10, and 7 nm FinFET ICs. ACM Great Lakes Symposium on VLSI (2016)
Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Praveen Raghavan, Francky Catthoor, Wim Dehaene
Quantification of Sense Amplifier Offset Voltage Degradation due to Zero-and Run-Time Variability. ISVLSI (2016)
Tarun Agarwal, Iuliana P. Radu, Praveen Raghavan, Gianluca Fiori, Aaron Thean, Marc M. Heyns, Wim Dehaene
Effect of material parameters on two-dimensional materials based TFETs: An energy-delay perspective. ESSCIRC (2016)
Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Sung Kyu Lim
How much cost reduction justifies the adoption of monolithic 3D ICs at 7nm node? ICCAD (2016)
Halil Kükner, Pieter Weckx, Sébastien Morrison, Jacopo Franco, Maria Toledano-Luque, Moonju Cho, Praveen Raghavan, Ben Kaczer, Doyoung Jang, Kenichi Miyaguchi, Marie Garcia Bardon, Francky Catthoor, Liesbet Van der Perre, Rudy Lauwereins, Guido Groeseneken
Comparison of NBTI aging on adder architectures and ring oscillators in the downscaling technology nodes. Microprocess. Microsystems 39 (8) (2015)
Chenyun Pan, Praveen Raghavan, Francky Catthoor, Zsolt Tokei, Azad Naeemi
Technology/circuit co-optimization and benchmarking for graphene interconnects at Sub-10nm technology node. ISQED (2015)
Robert Fasthuber, Praveen Raghavan, Liesbet Van der Perre, Francky Catthoor
A Scalable MIMO Detector Processor With Near-ASIC Energy Efficiency. IEEE Trans. Very Large Scale Integr. Syst. 23 (10) (2015)
Ben Kaczer, Jacopo Franco, Pieter Weckx, Philippe Roussel, Erik Bury, Moonju Cho, Robin Degraeve, Dimitri Linten, Guido Groeseneken, Halil Kukner, Praveen Raghavan, Francky Catthoor, Gerhard Rzepa, Wolfgang Gös, Tibor Grasser
The defect-centric perspective of device and circuit reliability - From individual defects to circuits. ESSDERC (2015)
Nathalie Fievet, Praveen Raghavan, Rogier Baert, Frédéric Robert, Abdelkarim Mercha, Diederik Verkest, Aaron Thean
Impact of device and interconnect process variability on clock distribution. ICICDT (2015)
Odysseas Zografos, Praveen Raghavan, Yasser Sherazi, Adrien Vaysset, Florin Ciubatoru, Bart Soree, Rudy Lauwereins, Iuliana P. Radu, Aaron Thean
Area and routing efficiency of SWD circuits compared to advanced CMOS. ICICDT (2015)
Marie Garcia Bardon, P. Schuddinck, Praveen Raghavan, Doyoung Jang, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Thean
Dimensioning for power and performance under 10nm: The limits of FinFETs scaling. ICICDT (2015)
Kenichi Miyaguchi, Bertrand Parvais, Lars-Åke Ragnarsson, Piet Wambacq, Praveen Raghavan, Abdelkarim Mercha, Anda Mocuta, Diederik Verkest, Aaron Thean
Modeling FinFET metal gate stack resistance for 14nm node and beyond. ICICDT (2015)
Namita Sharma, Preeti Ranjan Panda, Francky Catthoor, Praveen Raghavan, Tom Vander Aa
Array Interleaving - An Energy-Efficient Data Layout Transformation. ACM Trans. Design Autom. Electr. Syst. 20 (3) (2015)
Pieter Weckx, Ben Kaczer, Praveen Raghavan, Jacopo Franco, Marco Simicic, Philippe J. Roussel, Dimitri Linten, Aaron Thean, Diederik Verkest, Francky Catthoor, Guido Groeseneken
Characterization and simulation methodology for time-dependent variability in advanced technologies. CICC (2015)
Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Halil Kukner, Pieter Weckx, Praveen Raghavan, Francky Catthoor
Integral impact of BTI and voltage temperature variation on SRAM sense amplifier. VTS (2015)
Dmitry Yakimets, Doyoung Jang, Praveen Raghavan, Geert Eneman, Hans Mertens, P. Schuddinck, Arindam Mallik, Marie Garcia Bardon, Nadine Collaert, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Kristin De Meyer
Lateral NWFET optimization for beyond 7nm nodes. ICICDT (2015)
Raf Appeltans, Stefan Cosemans, Praveen Raghavan, Diederik Verkest, Liesbet Van der Perre, Wim Dehaene
STT-MRAM cell design with partial source line planes: improving the trade-off between area and series resistance. NVMSA (2015)
Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Stefan Cosemans, Pieter Weckx, Praveen Raghavan, Francky Catthoor
Comparative analysis of RD and Atomistic trap-based BTI models on SRAM Sense Amplifier. DTIS (2015)
Ioannis Karageorgos, Michele Stucchi, Praveen Raghavan, Julien Ryckaert, Zsolt Tokei, Diederik Verkest, Rogier Baert, Sushil Sakhare, Wim Dehaene
Impact of interconnect multiple-patterning variability on SRAMs. DATE (2015)
Behzad Zeinali, Jens Kargaard Madsen, Praveen Raghavan, Farshad Moradi
Sub-Threshold SRAM Design in 14 Nm FinFET Technology with Improved Access Time and Leakage Power. ISVLSI (2015)
Praveen Raghavan, Marie Garcia Bardon, Doyoung Jang, P. Schuddinck, Dmitry Yakimets, Julien Ryckaert, Abdelkarim Mercha, Naoto Horiguchi, Nadine Collaert, Anda Mocuta, Dan Mocuta, Zsolt Tokei, Diederik Verkest, Aaron Thean, A. Steegen
Holisitic device exploration for 7nm node. CICC (2015)
Tobias Gemmeke, Mohamed M. Sabry, Jan Stuijt, Praveen Raghavan, Francky Catthoor, David Atienza
Resolving the memory bottleneck for single supply near-threshold computing. DATE (2014)
Seyab Khan, Innocent Agbo, Said Hamdioui, Halil Kukner, Ben Kaczer, Praveen Raghavan, Francky Catthoor
Bias Temperature Instability analysis of FinFET based SRAM cells. DATE (2014)
Julien Ryckaert, Praveen Raghavan, Rogier Baert, Marie Garcia Bardon, M. Dusa, Arindam Mallik, Sushil Sakhare, B. Vandewalle, Piet Wambacq, Bharani Chava, Kris Croes, Morin Dehan, Doyoung Jang, P. Leray, T.-T. Liu, Kenichi Miyaguchi, Bertrand Parvais, P. Schuddinck, P. Weemaes, Abdelkarim Mercha, Jürgen Bömmels, N. Horiguchi, G. McIntyre, Aaron Thean, Zsolt Tokei, S. Cheng, Diederik Verkest, A. Steegen
Design Technology co-optimization for N10. CICC (2014)
Halil Kukner, Moustafa A. Khatib, Sebastien Morrison, Pieter Weckx, Praveen Raghavan, Ben Kaczer, Francky Catthoor, Liesbet Van der Perre, Rudy Lauwereins, Guido Groeseneken
Degradation analysis of datapath logic subblocks under NBTI aging in FinFET technology. ISQED (2014)
Odysseas Zografos, Praveen Raghavan, Luca Gaetano Amarù, Bart Soree, Rudy Lauwereins, Iuliana P. Radu, Diederik Verkest, Aaron Thean
System-level assessment and area evaluation of Spin Wave logic circuits. NANOARCH (2014)
Matthias Hartmann, Halil Kükner, Prashant Agrawal, Praveen Raghavan, Liesbet Van der Perre, Wim Dehaene
Modelling and mitigation of time-zero variability in sub-16nm finfet-based STT-MRAM memories. ACM Great Lakes Symposium on VLSI (2014)
Trong Huynh Bao, Dmitry Yakimets, Julien Ryckaert, Ivan Ciofi, Rogier Baert, Anabela Veloso, Jürgen Bömmels, Nadine Collaert, Philippe Roussel, S. Demuynck, Praveen Raghavan, Abdelkarim Mercha, Zsolt Tokei, Diederik Verkest, Aaron Thean, Piet Wambacq
Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies. ESSDERC (2014)
Manu Komalan, José Ignacio Gómez Pérez, Christian Tenllado, Praveen Raghavan, Matthias Hartmann, Francky Catthoor
Feasibility exploration of NVM based I-cache through MSHR enhancements. DATE (2014)
Prashant Agrawal, Dragomir Milojevic, Praveen Raghavan, Francky Catthoor, Liesbet Van der Perre, Eric Beyne, Ravi Varadarajan
System Level Comparison of 3D Integration Technologies for Future Mobile MPSoC Platform. IEEE Embed. Syst. Lett. 6 (4) (2014)
Halil Kukner, Pieter Weckx, Sebastien Morrison, Praveen Raghavan, Ben Kaczer, Francky Catthoor, Liesbet Van der Perre, Rudy Lauwereins, Guido Groeseneken
NBTI Aging on 32-Bit Adders in the Downscaling Planar FET Technology Nodes. DSD (2014)
Ittetsu Taniguchi, Kohei Aoki, Hiroyuki Tomiyama, Praveen Raghavan, Francky Catthoor, Masahiro Fukui
Fast and Accurate Architecture Exploration for High Performance and Low Energy VLIW Data-Path. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2014)
Odysseas Zografos, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Praveen Raghavan, Giovanni De Micheli
Majority Logic Synthesis for Spin Wave Technology. DSD (2014)
Wim Meeus, Tom Vander Aa, Praveen Raghavan, Dirk Stroobandt
Hard versus Soft Software Defined Radio. VLSI Design (2014)
Prabhat Avasare, Jeroen Declerck, Miguel Glassee, Amir Amin, Erik Umans, Praveen Raghavan, Martin Palkovic
Design Flow for Silicon Chip Implementing Novel Platform Architecture for Wireless Communication. Int. J. Embed. Real Time Commun. Syst. 4 (1) (2013)
Seyab Khan, Mottaqiallah Taouil, Said Hamdioui, Halil Kukner, Praveen Raghavan, Francky Catthoor
Impact of partial resistive defects and Bias Temperature Instability on SRAM decoder reliablity. IDT (2013)
Prashant Agrawal, Praveen Raghavan, Matthias Hartmann, Namita Sharma, Liesbet Van der Perre, Francky Catthoor
Early exploration for platform architecture instantiation with multi-mode application partitioning. DAC (2013)
Meng Li, Frederik Naessens, Peter Debacker, Praveen Raghavan, Claude Desset, Min Li, Antoine Dejonghe, Liesbet Van der Perre
An area and energy efficient half-row-paralleled layer LDPC decoder for the 802.11AD standard. SiPS (2013)
Halil Kükner, Pieter Weckx, Praveen Raghavan, Ben Kaczer, Francky Catthoor, Liesbet Van der Perre, Rudy Lauwereins, Guido Groeseneken
Impact of duty factor, stress stimuli, gate and drive strength on gate delay degradation with an atomistic trap-based BTI model. Microprocess. Microsystems 37 (8-A) (2013)
Nikolaos Zompakis, Antonis Papanikolaou, Praveen Raghavan, Dimitrios Soudris, Francky Catthoor
Enabling Efficient System Configurations for Dynamic Wireless Applications Using System Scenarios. Int. J. Wirel. Inf. Networks 20 (2) (2013)
Namita Sharma, Tom Vander Aa, Prashant Agrawal, Praveen Raghavan, Preeti Ranjan Panda, Francky Catthoor
Data memory optimization in LTE downlink. ICASSP (2013)
Antonio Artés, José Luis Ayala, Robert Fasthuber, Praveen Raghavan, Francky Catthoor
Energy impact in the design space exploration of loop buffer schemes in embedded systems. VLSI-SoC (2013)
Seyab Khan, Said Hamdioui, Halil Kukner, Praveen Raghavan, Francky Catthoor
Bias temperature instability analysis in SRAM decoder. ETS (2013)
Matthias Hartmann, Praveen Raghavan, Liesbet Van der Perre, Prashant Agrawal, Wim Dehaene
Memristor-Based (ReRAM) Data Memory Architecture in ASIP Design. DSD (2013)
Antonio Artés, Robert Fasthuber, José Luis Ayala, Praveen Raghavan, Francky Catthoor
Design Space Exploration of Distributed Loop Buffer Architectures with Incompatible Loop-Nest Organisations in Embedded Systems. J. Signal Process. Syst. 72 (1) (2013)
Meng Li, Frederik Naessens, Min Li, Peter Debacker, Claude Desset, Praveen Raghavan, Antoine Dejonghe, Liesbet Van der Perre
A processor based multi-standard low-power LDPC engine for multi-Gbps wireless communication. GlobalSIP (2013)
Min Li, Amir Amin, Raf Appeltans, Andy Folens, Ubaid Ahmad, Hans Cappelle, Peter Debacker, Lieven Hollevoet, André Bourdoux, Praveen Raghavan, Antoine Dejonghe, Liesbet Van der Perre
A C-programmable baseband processor with inner modem implementations for LTE Cat-4/5/7 and Gbps 80MHz 4×4 802.11ac (invited). GlobalSIP (2013)
Vojkan Vidojkovic, Viki Szortyka, Khaled Khalaf, Giovanni Mangraviti, Bertrand Parvais, Kristof Vaesen, Steven Brebels, Annachiara Spagnolo, Michael Libois, John R. Long, Kuba Raczkowski, Praveen Raghavan, André Bourdoux, Min Li, Charlotte Soens, Vito Giannini, Piet Wambacq
CMOS low-power transceivers for 60GHz multi Gbit/s communications. CICC (2013)
Martin Palkovic, Jeroen Declerck, Prabhat Avasare, Miguel Glassee, Andy Dewilde, Praveen Raghavan, Antoine Dejonghe, Liesbet Van der Perre
DART - a High Level Software-Defined Radio Platform Model for Developing the Run-Time Controller. J. Signal Process. Syst. 69 (3) (2012)
Prashant Agrawal, Kanishk Sugand, Martin Palkovic, Praveen Raghavan, Liesbet Van der Perre, Francky Catthoor
Partitioning and Assignment Exploration for Multiple Modes of IEEE 802.11n Modem on Heterogeneous MPSoC Platforms. DSD (2012)
Halil Kukner, Pieter Weckx, Praveen Raghavan, Ben Kaczer, Francky Catthoor, Liesbet Van der Perre, Rudy Lauwereins, Guido Groeseneken
Impact of Duty Factor, Stress Stimuli, and Gate Drive Strength on Gate Delay Degradation with an Atomistic Trap-Based BTI Model. DSD (2012)
Jeroen Declerck, Prabhat Avasare, Miguel Glassee, Amir Amin, Erik Umans, Andy Dewilde, Praveen Raghavan, Martin Palkovic
A flexible platform architecture for Gbps wireless communication. ISSoC (2012)
Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Ettore Speziale, Diego Melpignano, J. M. Zins, David Siorpaes, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Alexandros Bartzas, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Heinrich Meyr, Junaid Ansari, Petri Mähönen, Bart Vanthournout
Parallel paradigms and run-time management techniques for many-core architectures: the 2PARMA approach. INA-OCMC@HiPEAC (2012)
Seyab Khan, Said Hamdioui, Halil Kukner, Praveen Raghavan, Francky Catthoor
BTI impact on logical gates in nano-scale CMOS technology. DDECS (2012)
Seyab Khan, Said Hamdioui, Halil Kukner, Praveen Raghavan, Francky Catthoor
Incorporating parameter variations in BTI impact on nano-scale logical gates analysis. DFT (2012)
Kiyotaka Kobayashi, Hidekuni Yomo, Min Li, Raf Appeltans, Hans Cappelle, Amir Amin, Aïssa Couvreur, Matthias Hartmann, André Bourdoux, Praveen Raghavan, Antoine Dejonghe, Liesbet Van der Perre
Algorithm-Architecture Co-Optimization of Area-Efficient SDR Baseband for Highly Diversified Digital TV Standards. VTC Spring (2012)
Ittetsu Taniguchi, Mitsuya Uchida, Hiroyuki Tomiyama, Masahiro Fukui, Praveen Raghavan, Francky Catthoor
An Energy Aware Design Space Exploration for VLIW AGU Model with Fine Grained Power Gating. DSD (2011)
Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Ettore Speziale, Diego Melpignano, J. M. Zins, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Iraklis Anagnostopoulos, Alexandros Bartzas, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Junaid Ansari, Petri Mähönen, Bart Vanthournout
Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach. ReCoSoC (2011)
Tom Vander Aa, Martin Palkovic, Matthias Hartmann, Praveen Raghavan, Antoine Dejonghe, Liesbet Van der Perre
A multi-threaded coarse-grained array processor for wireless baseband. SASP (2011)
Ittetsu Taniguchi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai
Automated architecture exploration for low energy reconfigurable AGU. ISOCC (2011)
Nikolaos Zompakis, Antonis Papanikolaou, Praveen Raghavan, Dimitrios Soudris, Francky Catthoor
Enabling efficient system configurations for dynamic wireless baseband engines using system scenarios. SiPS (2011)
Robert Fasthuber, Min Li, David Novo, Praveen Raghavan, Liesbet Van der Perre, Francky Catthoor
Exploration of Soft-Output MIMO Detector Implementations on Massive Parallel Processors. J. Signal Process. Syst. 64 (1) (2011)
Martin Palkovic, Jeroen Declerck, Praveen Raghavan, Antoine Dejonghe, Liesbet Van der Perre
Dart - a high level software-defined radio platform model for developing the run-time controller. ICASSP (2011)
Prashant Agrawal, Robert Fasthuber, Praveen Raghavan, Tom Vander Aa, Ubaid Ahmad, Liesbet Van der Perre, Francky Catthoor
High level analysis of trade-offs across different partitioning schemes for wireless applications. SiPS (2011)
Tom Vander Aa, Praveen Raghavan, Scott A. Mahlke, Bjorn De Sutter, Aviral Shrivastava, Frank Hannig
Compilation techniques for CGRAs: exploring all parallelization approaches. CODES+ISSS (2010)
Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Andrea Di Biagio, Ettore Speziale, Michele Tartara, Diego Melpignano, J. M. Zins, David Siorpaes, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Alexandros Bartzas, Sotirios Xydis, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Junaid Ansari, Petri Mähönen, Bart Vanthournout
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-Core Architectures. ISVLSI (Selected papers) (2010)
Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Andrea Di Biagio, Ettore Speziale, Michele Tartara, David Siorpaes, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Alexandros Bartzas, Sotirios Xydis, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Junaid Ansari, Petri Mähönen, Bart Vanthournout
2PARMA: Parallel Paradigms and Run-Time Management Techniques for Many-Core Architectures. ISVLSI (2010)
Jeroen Declerck, Praveen Raghavan, Frederik Naessens, Tom Vander Aa, Lieven Hollevoet, Antoine Dejonghe, Liesbet Van der Perre
SDR platform for 802.11n and 3-GPP LTE. ICSAMOS (2010)
Bjorn De Sutter, Osman Allam, Praveen Raghavan, Roeland Vandebriel, Hans Cappelle, Tom Vander Aa, Bingfeng Mei
An Efficient Memory Organization for High-ILP Inner Modem Baseband SDR Processors. J. Signal Process. Syst. 61 (2) (2010)
Martin Palkovic, Praveen Raghavan, Min Li, Antoine Dejonghe, Liesbet Van der Perre, Francky Catthoor
Future Software-Defined Radio Platforms and Mapping Flows. IEEE Signal Process. Mag. 27 (2) (2010)
Oscar Gustafsson, Kiarash Amiri, Dennis Andersson, Anton Blad, Christian Bonnet, Joseph R. Cavallaro, Jeroen Declerck, Antoine Dejonghe, Patrik Eliardsson, Miguel Glassee, Aawatif Hayar, Lieven Hollevoet, Christopher Hunter, Madhura Joshi, Florian Kaltenberger, Raymond Knopp, Khanh Le, Zoran Miljanic, Patrick Murphy, Frederik Naessens, Navid Nikaein, Dominique Nussbaum, Renaud Pacalet, Praveen Raghavan, Ashutosh Sabharwal, Onkar Sarode, Predrag Spasojevic, Yang Sun, Hugo M. Tullberg, Tom Vander Aa, Liesbet Van der Perre, Michelle Wetterwald, Michael Wu
Architectures for cognitive radio testbeds and demonstrators - An overview. CrownCom (2010)
David Novo, Min Li, Robert Fasthuber, Praveen Raghavan, Francky Catthoor
Exploiting finite precision information to guide data-flow mapping. DAC (2010)
David Novo, Angeliki Kritikakou, Praveen Raghavan, Liesbet Van der Perre, Jos Huisken, Francky Catthoor
Ultra low energy Domain Specific Instruction-set Processor for on-line surveillance. SASP (2010)
Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest
EMPIRE: Empirical power/area/timing models for register files. Microprocess. Microsystems 33 (4) (2009)
David Novo, Robert Fasthuber, Praveen Raghavan, André Bourdoux, Min Li, Liesbet Van der Perre, Francky Catthoor
Power-aware evaluation flowfor digital decimation filter architectures for high-speed ADCS. SiPS (2009)
Robert Fasthuber, Min Li, David Novo, Praveen Raghavan, Liesbet Van der Perre, Francky Catthoor
Novel energy-efficient scalable soft-output SSFE MIMO detector architectures. ICSAMOS (2009)
Andy Lambrechts, Praveen Raghavan, Murali Jayapala, Bingfeng Mei, Francky Catthoor, Diederik Verkest
Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable Architectures. IEEE Trans. Very Large Scale Integr. Syst. 17 (1) (2009)
Praveen Raghavan, Francky Catthoor
SARA: StreAm register allocation. CODES+ISSS (2009)

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Praveen Raghavan