IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

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Publications

volume 43, number 1, 2024

volume 43, number 2, 2024

Pei Yuan, Jonathan Allcock, Shengyu Zhang
Does Qubit Connectivity Impact Quantum Circuit Complexity? IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Tianchen Gu, Wangzhen Li, Aidong Zhao, Zhaori Bi, Xudong Li, Fan Yang, Changhao Yan, Wenchuang Walter Hu, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng
BBGP-sDFO: Batch Bayesian and Gaussian Process Enhanced Subspace Derivative Free Optimization for High-Dimensional Analog Circuit Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Jerin Joe, Nilanjan Mukherjee, Irith Pomeranz, Janusz Rajski
Generation of Two-Cycle Tests for Structurally Similar Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Rassul Bairamkulov, Eby G. Friedman
Power Aware Placement of On-Chip Voltage Regulators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Keyu Peng, Wenxing Zhu
Pplace-MS: Methodologically Faster Poisson's Equation-Based Mixed-Size Global Placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Weihong Liu, Jiawei Geng, Zongwei Zhu, Yang Zhao, Cheng Ji, Changlong Li, Zirui Lian, Xuehai Zhou
Ace-Sniper: Cloud-Edge Collaborative Scheduling Framework With DNN Inference Latency Modeling on Heterogeneous Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Yiwen Zhang, Hui Zheng, Zonghua Gu
EDF-Based Energy-Efficient Semi-Clairvoyant Scheduling With Graceful Degradation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Hongbing Tan, Libo Huang, Zhong Zheng, Hui Guo, Qianming Yang, Li Shen, Gang Chen, Liquan Xiao, Nong Xiao
A Low-Cost Floating-Point Dot-Product-Dual-Accumulate Architecture for HPC-Enabled AI. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Jiandong Mu, Mengdi Wang, Feiwen Zhu, Jun Yang, Wei Lin, Wei Zhang
Boosting the Convergence of Reinforcement Learning-Based Auto-Pruning Using Historical Data. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Kyeonghyeon Baek, Taewhan Kim
CSyn-fp: Standard Cell Synthesis of Advanced Nodes With Simultaneous Transistor Folding and Placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Chao Fang, Wei Sun, Aojun Zhou, Zhongfeng Wang
Efficient N:M Sparse DNN Training Using Algorithm, Architecture, and Dataflow Co-Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Burin Amornpaisannon, Andreas Diavastos, Li-Shiuan Peh, Trevor E. Carlson
Secure Run-Time Hardware Trojan Detection Using Lightweight Analytical Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Zheng Xiao, Weijie Chen, Yunchuan Qin, Fan Wu, Anthony Theodore Chronopoulos, Alex Nicolau, Kenli Li
NGLIC: A Nonaligned-Row Legalization Approach for 3-D Interdie Connection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Yang Bai, Xufeng Yao, Qi Sun, Wenqian Zhao, Shixin Chen, Zixiao Wang, Bei Yu
GTCO: Graph and Tensor Co-Design for Transformer-Based Image Recognition on Tensor Cores. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Kai-Xuan Lee, Chun-Chieh Lin, Tzu-Chiao Yen, Ya-Shu Chen, Chan-Peng Hsu
FASE: Energy Isolation Framework for Latency-Sensitive Applications in Intermittent Systems With Multiple Peripherals. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Yiwen Zhang, Jin-Peng Ma, Hui Zheng, Zonghua Gu
Criticality-Aware EDF Scheduling for Constrained-Deadline Imprecise Mixed-Criticality Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Jing Mai, Jiarui Wang, Zhixiong Di, Yibo Lin
Multielectrostatic FPGA Placement Considering SLICEL-SLICEM Heterogeneity, Clock Feasibility, and Timing Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Amro Eldebiky, Grace Li Zhang, Georg Böcherer, Bing Li, Ulf Schlichtmann
CorrectNet+: Dealing With HW Non-Idealities in In-Memory-Computing Platforms by Error Suppression and Compensation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Zhaoting Chen, Junzhe Cai, Changhao Yan, Zhaori Bi, Yuzhe Ma, Bei Yu, Wenchuang Walter Hu, Dian Zhou, Xuan Zeng
pNeurFill: Enhanced Neural Network Model-Based Dummy Filling Synthesis With Perimeter Adjustment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Janusz Rajski, Maciej Trawka, Jerzy Tyszer, Bartosz Wlodarczak
B: Crypto Hash Functions Based on Hybrid Ring Generators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Pavlos Zouridakis, Sai Manoj Pudukotai Dinakarrao
Performance- and Energy-Aware Gait-Based User Authentication With Intermittent Computation for IoT Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Alireza Ghaffari, Masoud Asgharian, Yvon Savaria
Statistical Hardware Design With Multimodel Active Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)
Zeming Cheng, Bo Zhang, Massoud Pedram
A High-Performance, Conflict-Free Memory-Access Architecture for Modular Polynomial Multiplication. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (2) (2024)

volume 43, number 3, 2024