Jordi Cortadella

ORCID

Publication Activity (10 Years)

Years Active: 1988-2024
Publications (10 Years): 37

Top Venues

ASYNC

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

DATE

IEEE Access

Publications

Lorenzo Lagostina, Filippo Minnella, Jordi Cortadella, Mario R. Casu, Mihai T. Lazarescu, Luciano Lavagno
Mix & Latch: Comparison With State-of-the-Art Retiming on a RISC-V Benchmark. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (7) (2024)
Jiahui Xu, Emmet Murphy, Jordi Cortadella, Lana Josipovic
Eliminating Excessive Dynamism of Dataflow Circuits Using Model Checking. FPGA (2023)
Viktor Teren, Jordi Cortadella, Tiziano Villa
Seto: A Framework for the Decomposition of Petri Nets and Transition Systems. DSD (2023)
Viktor Teren, Jordi Cortadella, Tiziano Villa
Generation of synchronizing state machines from a transition system: A region-based approach. Int. J. Appl. Math. Comput. Sci. 33 (1) (2023)
Filippo Minnella, Jordi Cortadella, Mario R. Casu, Mihai T. Lazarescu, Luciano Lavagno
Mix & Latch: An Optimization Flow for High-Performance Designs With Single-Clock Mixed-Polarity Latches and Flip-Flops. IEEE Access 11 (2023)
Junnan Shan, Mihai T. Lazarescu, Jordi Cortadella, Luciano Lavagno, Mario R. Casu
Fast Energy-Optimal Multikernel DNN-Like Application Allocation on Multi-FPGA Platforms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (4) (2022)
Lana Josipovic, Shabnam Sheikhha, Andrea Guerrieri, Paolo Ienne, Jordi Cortadella
Buffer Placement and Sizing for High-Performance Dataflow Circuits. ACM Trans. Reconfigurable Technol. Syst. 15 (1) (2022)
Viktor Teren, Jordi Cortadella, Tiziano Villa
Decomposition of transition systems into sets of synchronizing Free-choice Petri Nets. DSD (2022)
Alex Vidal-Obiols, Jordi Cortadella, Jordi Petit, Marc Galceran Oms, Ferran Martorell
Multilevel Dataflow-Driven Macro Placement Guided by RTL Structure and Analytical Methods. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (12) (2021)
Viktor Teren, Jordi Cortadella, Tiziano Villa
Decomposition of transition systems into sets of synchronizing state machines. CoRR (2021)
Viktor Teren, Jordi Cortadella, Tiziano Villa
Decomposition of transition systems into sets of synchronizing state machines. DSD (2021)
Junnan Shan, Mihai T. Lazarescu, Jordi Cortadella, Luciano Lavagno, Mario R. Casu
CNN-on-AWS: Efficient Allocation of Multikernel Applications on Multi-FPGA Platforms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (2) (2021)
Lana Josipovic, Shabnam Sheikhha, Andrea Guerrieri, Paolo Ienne, Jordi Cortadella
Buffer Placement and Sizing for High-Performance Dataflow Circuits. FPGA (2020)
Junnan Shan, Mihai T. Lazarescu, Jordi Cortadella, Luciano Lavagno, Mario R. Casu
Power-Optimal Mapping of CNN Applications to Cloud-Based Multi-FPGA Platforms. IEEE Trans. Circuits Syst. (12) (2020)
Anna Bernasconi, Valentina Ciriani, Jordi Cortadella, Tiziano Villa
Computing the full quotient in bi-decomposition by approximation. DATE (2020)
Lucas Machado, Jordi Cortadella
Support-Reducing Decomposition for FPGA Mapping. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (1) (2020)
Juan Segarra, Jordi Cortadella, Ruben Gran Tejero, Víctor Viñals Yúfera
Automatic Safe Data Reuse Detection for the WCET Analysis of Systems With Data Caches. IEEE Access 8 (2020)
Maicon Schneider Cardoso, Andrei A. O. Bubolz, Jordi Cortadella, Leomar Rosa, Felipe S. Marques
Transistor Placement for Automatic Cell Synthesis through Boolean Satisfiability. ISCAS (2020)
Alex Vidal-Obiols, Jordi Cortadella, Jordi Petit, Marc Galceran Oms, Ferran Martorell
RTL-Aware Dataflow-Driven Macro Placement. DATE (2019)
Jordi Petit, Salvador Roura, Josep Carmona, Jordi Cortadella, Jordi Duch, Omer Giménez, Anaga Mani, Jan Mas, Enric Rodríguez-Carbonell, Enric Rubio, Enric de San Pedro, Divya Venkataramani
Corrections to "Jutge.org: Characteristics and Experiences". IEEE Trans. Learn. Technol. 12 (2) (2019)
Alberto Moreno, Danil Sokolov, Jordi Cortadella
Synthesis from Waveform Transition Graphs. ASYNC (2019)
Junnan Shan, Mario R. Casu, Jordi Cortadella, Luciano Lavagno, Mihai T. Lazarescu
Exact and Heuristic Allocation of Multi-kernel Applications to Multi-FPGA Platforms. DAC (2019)
Alberto Moreno, Jordi Cortadella
State-Based Encoding of Large Asynchronous Controllers. IEEE Access 6 (2018)
Jordi Petit, Salvador Roura, Josep Carmona, Jordi Cortadella, Jordi Duch, Omer Giménez, Anaga Mani, Jan Mas, Enric Rodríguez-Carbonell, Enric Rubio, Enric de San Pedro, Divya Venkataramani
Jutge.org: Characteristics and Experiences. IEEE Trans. Learn. Technol. 11 (3) (2018)
Alberto Moreno, Jordi Cortadella
State Encoding of Asynchronous Controllers Using Pseudo-Boolean Optimization. ASYNC (2018)
Alberto Moreno, Jordi Cortadella
Synthesis of All-Digital Delay Lines. ASYNC (2017)
Jordi Cortadella, Jordi Petit
A hierarchical mathematical model for automatic pipelining and allocation using elastic systems. ACSSC (2017)
Andrey Mokhov, Jordi Cortadella, Alessandro de Gennaro
Process Windows. ACSD (2017)
Jordi Cortadella, Alberto Moreno, Danil Sokolov, Alex Yakovlev, David Lloyd
Waveform Transition Graphs: A Designer-Friendly Formalism for Asynchronous Behaviours. ASYNC (2017)
Lucas Machado, Antoni Roca Perez, Jordi Cortadella
Voltage Noise Analysis with Ring Oscillator Clocks. ISVLSI (2017)
Alex Vidal-Obiols, Jordi Cortadella, Jordi Petit
Under-the-Cell Routing to Improve Manufacturability. ACM Great Lakes Symposium on VLSI (2017)
Lucas Machado, Jordi Cortadella
Boolean Decomposition for AIG Optimization. ACM Great Lakes Symposium on VLSI (2017)
Palkesh Jain, Jordi Cortadella, Sachin S. Sapatnekar
A Fast and Retargetable Framework for Logic-IP-Internal Electromigration Assessment Comprehending Advanced Waveform Effects. IEEE Trans. Very Large Scale Integr. Syst. 24 (6) (2016)
Jordi Cortadella, Marc Lupon, Alberto Moreno, Antoni Roca, Sachin S. Sapatnekar
Ring Oscillator Clocks and Margins. ASYNC (2016)
Javier de San Pedro, Jordi Cortadella
Discovering Duplicate Tasks in Transition Systems for the Simplification of Process Models. BPM (2016)
Javier de San Pedro, Thomas Bourgeat, Jordi Cortadella
Specification Mining for Asynchronous Controllers. ASYNC (2016)
Javier de San Pedro, Jordi Cortadella
Mining structured petri nets for the visualization of process behavior. SAC (2016)
Javier de San Pedro, Josep Carmona, Jordi Cortadella
Log-Based Simplification of Process Models. BPM (2015)
Palkesh Jain, Sachin S. Sapatnekar, Jordi Cortadella
A retargetable and accurate methodology for logic-IP-internal electromigration assessment. ASP-DAC (2015)
Jordi Cortadella, Marc Galceran Oms, Michael Kishinevsky, Sachin S. Sapatnekar
RTL Synthesis: From Logic Synthesis to Automatic Pipelining. Proc. IEEE 103 (11) (2015)
Marco Cannizzaro, Salomon Beer, Jordi Cortadella, Ran Ginosar, Luciano Lavagno
SafeRazor: Metastability-Robust Adaptive Clocking in Resilient Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2015)
Jordi Cortadella, Luciano Lavagno, Pedro Lopez, Marc Lupon, Alberto Moreno, Antoni Roca, Sachin S. Sapatnekar
Reactive clocks with variability-tracking jitter. ICCD (2015)
Palkesh Jain, Sachin S. Sapatnekar, Jordi Cortadella
Stochastic and topologically aware electromigration analysis for clock skew. IRPS (2015)
Jordi Cortadella, Jordi Petit, Sergio Gómez, Francesc Moll
A Boolean Rule-Based Approach for Manufacturability-Aware Cell Routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (3) (2014)
Josep Carmona, Jordi Cortadella
Process Discovery Algorithms Using Numerical Abstract Domains. IEEE Trans. Knowl. Data Eng. 26 (12) (2014)
Javier de San Pedro, Jordi Cortadella, Antoni Roca
A hierarchical approach for generating regular floorplans. ICCAD (2014)
Salomon Beer, Marco Cannizzaro, Jordi Cortadella, Ran Ginosar, Luciano Lavagno
Metastability in Better-Than-Worst-Case Designs. ASYNC (2014)
Giorgos Dimitrakopoulos, I. Seitanidis, Anastasios Psarras, K. Tsiouris, Pavlos M. Mattheakis, Jordi Cortadella
Hardware primitives for the synthesis of multithreaded elastic systems. DATE (2014)
Jordi Cortadella, Javier de San Pedro, Nikita Nikitin, Jordi Petit
Physical-aware system-level design for tiled hierarchical chip multiprocessors. ISPD (2013)
Javier de San Pedro, Nikita Nikitin, Jordi Cortadella, Jordi Petit
Physical planning for the architectural exploration of large-scale chip multiprocessors. NOCS (2013)
Nikita Nikitin, Javier de San Pedro, Jordi Cortadella
Architectural Exploration of Large-Scale Hierarchical Chip Multiprocessors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (10) (2013)
Ferdinand Peper, Jia Lee, Josep Carmona, Jordi Cortadella, Kenichi Morita
Brownian Circuits: Fundamentals. ACM J. Emerg. Technol. Comput. Syst. 9 (1) (2013)
Jordi Cortadella
Area-Optimal Transistor Folding for 1-D Gridded Cell Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (11) (2013)
Javier de San Pedro, Josep Carmona, Jordi Cortadella, Jordi Petit
Integrating formal verification in an online judge for e-Learning logic circuit design. SIGCSE (2012)
Nikita Nikitin, Javier de San Pedro, Josep Carmona, Jordi Cortadella
Analytical Performance Modeling of Hierarchical Interconnect Fabrics. NOCS (2012)
Nikita Nikitin, Jordi Cortadella
Static Task Mapping for Tiled Chip Multiprocessors with Multiple Voltage Islands. ARCS (2012)
Josep Carmona, Jorge Júlvez, Jordi Cortadella, Michael Kishinevsky
A Scheduling Strategy for Synchronous Elastic Designs. Fundam. Informaticae 108 (1-2) (2011)
Marc Galceran Oms, Alexander Gotmanov, Jordi Cortadella, Michael Kishinevsky
Microarchitectural Transformations Using Elasticity. ACM J. Emerg. Technol. Comput. Syst. 7 (4) (2011)
Jordi Cortadella, Marc Galceran Oms, Michael Kishinevsky
Elastic systems. MEMOCODE (2010)
Josep Carmona, Jordi Cortadella, Michael Kishinevsky
New Region-Based Algorithms for Deriving Bounded Petri Nets. IEEE Trans. Computers 59 (3) (2010)
Nikita Nikitin, Satrajit Chatterjee, Jordi Cortadella, Michael Kishinevsky, Ümit Y. Ogras
Physical-Aware Link Allocation and Route Assignment for Chip Multiprocessing. NOCS (2010)
Jorge Júlvez, Jordi Cortadella, Michael Kishinevsky
On the Performance Evaluation of Multi-Guarded Marked Graphs with Single-Server Semantics. Discret. Event Dyn. Syst. 20 (3) (2010)
Marc Galceran Oms, Jordi Cortadella, Dmitry Bufistov, Michael Kishinevsky
Automatic microarchitectural pipelining. DATE (2010)
Josep Carmona, Jordi Cortadella
Process Mining Meets Abstract Interpretation. ECML/PKDD (1) (2010)
Marc Galceran Oms, Jordi Cortadella, Michael Kishinevsky
Symbolic performance analysis of elastic systems. ICCAD (2010)
David Bañeres, Jordi Cortadella, Michael Kishinevsky
Variable-latency design by function speculation. DATE (2009)
Josep Carmona, Jorge Júlvez, Jordi Cortadella, Michael Kishinevsky
Scheduling Synchronous Elastic Designs. ACSD (2009)
David Bañeres, Jordi Cortadella, Michael Kishinevsky
Timing-driven N-way decomposition. ACM Great Lakes Symposium on VLSI (2009)
Marc Galceran Oms, Jordi Cortadella, Michael Kishinevsky
Speculation in elastic systems. DAC (2009)
Emre Tuncer, Jordi Cortadella, Luciano Lavagno
Enabling adaptability through elastic clocks. DAC (2009)
Dmitry Bufistov, Jordi Cortadella, Marc Galceran Oms, Jorge Júlvez, Michael Kishinevsky
Retiming and recycling for elastic systems with early evaluation. DAC (2009)
David Bañeres, Jordi Cortadella, Michael Kishinevsky
A Recursive Paradigm to Solve Boolean Relations. IEEE Trans. Computers 58 (4) (2009)
Nikita Nikitin, Jordi Cortadella
A performance analytical model for Network-on-Chip with constant service time routers. ICCAD (2009)
Josep Carmona, Jordi Cortadella, Michael Kishinevsky, Alexander Taubin
Elastic Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (10) (2009)
Josep Carmona, Jordi Cortadella, Michael Kishinevsky
Genet: A Tool for the Synthesis and Mining of Petri Nets. ACSD (2009)
Jonas Casanova, Jordi Cortadella
Multi-level clustering for clock skew optimization. ICCAD (2009)
Jordi Cortadella, Alexander Taubin
Guest Editorial: Special Section on Asynchronous Circuits and Systems. IEEE Trans. Very Large Scale Integr. Syst. 17 (7) (2009)
Josep Carmona, Jordi Cortadella, Michael Kishinevsky
Divide-and-Conquer Strategies for Process Mining. BPM (2009)
Josep Carmona, Jordi Cortadella, Yousuke Takada, Ferdinand Peper
Formal methods for the analysis and synthesis of nanometer-scale cellular arrays. ACM J. Emerg. Technol. Comput. Syst. 4 (2) (2008)
Josep Carmona, Jordi Cortadella, Michael Kishinevsky
A Region-Based Algorithm for Discovering Petri Nets from Event Logs. BPM (2008)
Josep Carmona, Jordi Cortadella
Encoding Large Asynchronous Controllers With ILP Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (1) (2008)
Josep Carmona, Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev
A Symbolic Algorithm for the Synthesis of Bounded Petri Nets. Petri Nets (2008)
Jordi Cortadella, Michael Kishinevsky, Dmitry Bufistov, Josep Carmona, Jorge Júlvez
Elasticity and Petri Nets. Trans. Petri Nets Other Model. Concurr. 1 (2008)
Dmitry Bufistov, Jorge Júlvez, Jordi Cortadella
Performance optimization of elastic systems using buffer resizing and buffer insertion. ICCAD (2008)
Timothy Kam, Michael Kishinevsky, Jordi Cortadella, Marc Galceran Oms
Correct-by-construction microarchitectural pipelining. ICCAD (2008)
Michael Kishinevsky, Jordi Cortadella
Time elastic digital systems and Petri Nets. ACSD (2008)
Kyller Costa Gorgônio, Jordi Cortadella
Hardware Synthesis for Asynchronous Communications Mechanisms. SCCC (2008)
Dmitry Bufistov, Jordi Cortadella, Michael Kishinevsky, Sachin S. Sapatnekar
A general model for performance optimization of sequential systems. ICCAD (2007)
Robert Clarisó, Jordi Cortadella
Verification of Concurrent Systems with Parametric Delays Using Octahedra. Fundam. Informaticae 78 (1) (2007)
Jordi Cortadella, Michael Kishinevsky
Synchronous Elastic Circuits with Early Evaluation and Token Counterflow. DAC (2007)
Robert Clarisó, Jordi Cortadella
The octahedron abstract domain. Sci. Comput. Program. 64 (1) (2007)
Kyller Costa Gorgônio, Jordi Cortadella, Fei Xia, Alexandre Yakovlev
Automating Synthesis of Asynchronous Communication Mechanisms. Fundam. Informaticae 78 (1) (2007)
Kyller Costa Gorgônio, Jordi Cortadella, Fei Xia
A Compositional Method for the Synthesis of Asynchronous Communication Mechanisms. ICATPN (2007)
Alexander Taubin, Jordi Cortadella, Luciano Lavagno, Alex Kondratyev, Ad M. G. Peeters
Design Automation of Real-Life Asynchronous Devices and Systems. Found. Trends Electron. Des. Autom. 2 (1) (2007)
David Bañeres, Jordi Cortadella, Michael Kishinevsky
Layout-aware gate duplication and buffer insertion. DATE (2007)
Michael Kishinevsky, Jordi Cortadella, Bill Grundmann, Sava Krstic, John O'Leary
Synchronous Elastic Circuits. CSR (2006)
Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Christos P. Sotiriou
Desynchronization: Synthesis of Asynchronous Circuits From Synchronous Specifications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (10) (2006)
Josep Carmona, Jordi Cortadella
State encoding of large asynchronous controllers. DAC (2006)
Sava Krstic, Jordi Cortadella, Michael Kishinevsky, John O'Leary
Synchronous Elastic Networks. FMCAD (2006)
Josep Carmona, Jordi Cortadella, Yousuke Takada, Ferdinand Peper
From molecular interactions to gates: a systematic approach. ICCAD (2006)

Jordi Cortadella.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Jordi Cortadella