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Mix & Latch: An Optimization Flow for High-Performance Designs With Single-Clock Mixed-Polarity Latches and Flip-Flops.

Filippo MinnellaJordi CortadellaMario R. CasuMihai T. LazarescuLuciano Lavagno
Published in: IEEE Access (2023)
Keyphrases
  • flip flops
  • power dissipation
  • power consumption
  • multiple input
  • high speed
  • sentiment analysis
  • cmos technology
  • neural network
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  • master slave