Login / Signup

Mix & Latch: An Optimization Flow for High-Performance Designs With Single-Clock Mixed-Polarity Latches and Flip-Flops.

Filippo MinnellaJordi CortadellaMario R. CasuMihai T. LazarescuLuciano Lavagno
Published in: IEEE Access (2023)
Keyphrases
  • flip flops
  • power dissipation
  • power consumption
  • multiple input
  • high speed
  • sentiment analysis
  • cmos technology
  • neural network
  • low cost
  • master slave