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Buffer Placement and Sizing for High-Performance Dataflow Circuits.
Lana Josipovic
Shabnam Sheikhha
Andrea Guerrieri
Paolo Ienne
Jordi Cortadella
Published in:
ACM Trans. Reconfigurable Technol. Syst. (2022)
Keyphrases
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data flow
buffer size
high speed
analog circuits
high reliability
parallel execution
analog vlsi
scientific computing
cost effective
vlsi circuits
delay insensitive
parallel computing
high efficiency
database machine
control flow
massively parallel
design methodology
buffer allocation
tunnel diode