Valentina Ciriani

Publication Activity (10 Years)

Years Active: 2001-2024
Publications (10 Years): 36

Top Topics

Decision Diagrams

Top Venues

IEEE Trans. Computers

Publications

Asma Taheri Monfared, Valentina Ciriani, Majid Haghparast
Qutrit representation of quantum images: new quantum ternary circuit design. Quantum Inf. Process. 23 (8) (2024)
Asma Taheri Monfared, Valentina Ciriani, Tommi Mikkonen, Majid Haghparast
Quaternary Reversible Circuit Optimization for Scalable Multiplexer and Demultiplexer. IEEE Access 11 (2023)
Anna Bernasconi, Valentina Ciriani, Asma Taheri Monfared, Stefano Zanoni
Compact Quantum Circuits for Dimension Reducible Functions. DSD (2023)
Anna Bernasconi, Alessandro Berti, Valentina Ciriani, Gianna M. Del Corso, Innocenzo Fulginiti
XOR-AND-XOR Logic Forms for Autosymmetric Functions and Applications to Quantum Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (6) (2023)
Asma Taheri Monfared, Valentina Ciriani, Lauri Kettunen, Majid Haghparast
Novel qutrit circuit design for multiplexer, De-multiplexer, and decoder. Quantum Inf. Process. 22 (1) (2023)
Anna Bernasconi, Valentina Ciriani, Marco Longhi
On the Optimal OBDD Representation of 2-XOR Boolean Affine Spaces. DATE (2022)
Anna Bernasconi, Valentina Ciriani, Tiziano Villa
Exploiting Symmetrization and D-Reducibility for Approximate Logic Synthesis. IEEE Trans. Computers 71 (1) (2022)
Maria Chiara Molteni, Vittorio Zaccaria, Valentina Ciriani
ADD-based Spectral Analysis of Probing Security. DATE (2022)
Anna Bernasconi, Stelvio Cimato, Valentina Ciriani, Maria Chiara Molteni
Multiplicative Complexity of XOR Based Regular Functions. IEEE Trans. Computers 71 (11) (2022)
Anna Bernasconi, Valentina Ciriani
Autosymmetry of Incompletely Specified Functions. DATE (2021)
Padmanabhan Balasubramanian, Anna Bernasconi, Valentina Ciriani, Tiziano Villa
A Boolean Heuristic for Disjoint SOP Synthesis. DSD (2021)
Lorena Anghel, Anna Bernasconi, Valentina Ciriani, Luca Frontini, Gabriella Trucco, Elena I. Vatajelu
Stuck-At Fault Mitigation of Emerging Technologies Based Switching Lattices. J. Electron. Test. 36 (3) (2020)
Anna Bernasconi, Valentina Ciriani, Jordi Cortadella, Tiziano Villa
Computing the full quotient in bi-decomposition by approximation. DATE (2020)
Anna Bernasconi, Stelvio Cimato, Valentina Ciriani, Maria Chiara Molteni
Multiplicative Complexity of Autosymmetric Functions: Theory and Applications to Security. DAC (2020)
Anna Bernasconi, Valentina Ciriani, Luca Frontini
Testability of Switching Lattices in the Cellular Fault Model. DSD (2019)
Lorena Anghel, Anna Bernasconi, Valentina Ciriani, Luca Frontini, Gabriella Trucco, Elena I. Vatajelu
Fault Mitigation of Switching Lattices under the Stuck-At-Fault Model. LATS (2019)
Stelvio Cimato, Valentina Ciriani, Ernesto Damiani, Maryam Ehsanpour
An OBDD-Based Technique for the Efficient Synthesis of Garbled Circuits. STM (2019)
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa
Boolean Minimization of Projected Sums of Products via Boolean Relations. IEEE Trans. Computers 68 (9) (2019)
Anna Bernasconi, Valentina Ciriani, Tiziano Villa
Approximate Logic Synthesis by Symmetrization. DATE (2019)
Muhammed Ceylan Morgül, Onur Tunali, Mustafa Altun, Luca Frontini, Valentina Ciriani, Elena Ioana Vatajelu, Lorena Anghel, Csaba Andras Moritz, Mircea R. Stan, Dan Alexandrescu
Integrated Synthesis Methodology for Crossbar Arrays. NANOARCH (2018)
Anna Bernasconi, Valentina Ciriani, Luca Frontini, Gabriella Trucco
Composition of switching lattices for regular and for decomposed functions. Microprocess. Microsystems 60 (2018)
Anna Bernasconi, Valentina Ciriani, Luca Frontini, Valentino Liberali, Gabriella Trucco, Tiziano Villa
Enhancing logic synthesis of switching lattices by generalized Shannon decomposition methods. Microprocess. Microsystems 56 (2018)
Anna Bernasconi, Valentina Ciriani, Luca Frontini
Testability of Switching Lattices in the Stuck at Fault Model. VLSI-SoC (2018)
Maryam Ehsanpour, Stelvio Cimato, Valentina Ciriani, Ernesto Damiani
Exploiting Quantum Gates in Secure Computation. DSD (2017)
Stelvio Cimato, Valentina Ciriani, Ernesto Damiani, Maryam Ehsanpour
A multiple valued logic approach for the synthesis of garbled circuits. VLSI-SoC (2017)
Dan Alexandrescu, Mustafa Altun, Lorena Anghel, Anna Bernasconi, Valentina Ciriani, Luca Frontini, Mehdi Baradaran Tahoori
Logic synthesis and testing techniques for switching nano-crossbar arrays. Microprocess. Microsystems 54 (2017)
Anna Bernasconi, Valentina Ciriani, Luca Frontini, Gabriella Trucco
Composition of Switching Lattices and Autosymmetric Boolean Function Synthesis. DSD (2017)
Mustafa Altun, Valentina Ciriani, Mehdi Baradaran Tahoori
Computing with nano-crossbar arrays: Logic synthesis and fault tolerance. DATE (2017)
Dan Alexandrescu, Mustafa Altun, Lorena Anghel, Anna Bernasconi, Valentina Ciriani, Luca Frontini, Mehdi Baradaran Tahoori
Synthesis and Performance Optimization of a Switching Nano-Crossbar Computer. DSD (2016)
Anna Bernasconi, Valentina Ciriani, Luca Frontini, Valentino Liberali, Gabriella Trucco, Tiziano Villa
Logic Synthesis for Switching Lattices by Decomposition with P-Circuits. DSD (2016)
Anna Bernasconi, Valentina Ciriani
Index-Resilient Zero-Suppressed BDDs: Definition and Operations. ACM Trans. Design Autom. Electr. Syst. 21 (4) (2016)
Anna Bernasconi, Valentina Ciriani, Luca Frontini, Gabriella Trucco
Synthesis on switching lattices of Dimension-reducible Boolean functions. VLSI-SoC (2016)
Anna Bernasconi, Robert K. Brayton, Valentina Ciriani, Gabriella Trucco, Tiziano Villa
Bi-Decomposition Using Boolean Relations. DSD (2015)
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco
Biconditional-BDD Ordering for Autosymmetric Functions. DSD (2015)
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa
Using Flexibility in P-Circuits by Boolean Relations. IEEE Trans. Computers 64 (12) (2015)
Anna Bernasconi, Valentina Ciriani, Lorenzo Lago
On the error resilience of ordered binary decision diagrams. Theor. Comput. Sci. 595 (2015)
Anna Bernasconi, Valentina Ciriani
Zero-Suppressed Binary Decision Diagrams Resilient to Index Faults. IFIP TCS (2014)
Anna Bernasconi, Valentina Ciriani
2-SPP Approximate Synthesis for Error Tolerant Applications. DSD (2014)
Valentina Ciriani, Luca Frontini, Valentino Liberali, Seyedruhollah Shojaii, Alberto Stabile, Gabriella Trucco
Radiation-tolerant standard cell synthesis using double-rail redundant approach. ICECS (2014)
Anna Bernasconi, Valentina Ciriani, Lorenzo Lago
On the Error Resilience of Ordered Binary Decision Diagrams. CoRR (2014)
Anna Bernasconi, Valentina Ciriani
Autosymmetric and Dimension Reducible Multiple-Valued Functions. J. Multiple Valued Log. Soft Comput. 23 (3-4) (2014)
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa
Minimization of EP-SOPs via Boolean relations. VLSI-SoC (2013)
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa
Minimization of P-circuits using Boolean relations. DATE (2013)
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa
SOP restructuring by exploiting don't cares. Microprocess. Microsystems 37 (8-A) (2013)
Anna Bernasconi, Valentina Ciriani, Fabrizio Luccio, Linda Pagli
Compact DSOP and Partial DSOP Forms. Theory Comput. Syst. 53 (4) (2013)
Anna Bernasconi, Valentina Ciriani, Lorenzo Lago
Error resilient OBDDs. DDECS (2013)
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa
Projected Don't Cares. DSD (2012)
Anna Bernasconi, Valentina Ciriani, Valentino Liberali, Gabriella Trucco, Tiziano Villa
Synthesis of P-circuits for logic restructuring. Integr. 45 (3) (2012)
Valentina Ciriani, Sabrina De Capitani di Vimercati, Sara Foresti, Giovanni Livraga, Pierangela Samarati
An OBDD approach to enforce confidentiality and visibility constraints in data publishing. J. Comput. Secur. 20 (5) (2012)
Anna Bernasconi, Valentina Ciriani, Fabrizio Luccio, Linda Pagli
Compact DSOP and partial DSOP Forms CoRR (2012)
Valentina Ciriani, Sabrina De Capitani di Vimercati, Sara Foresti, Sushil Jajodia, Stefano Paraboschi, Pierangela Samarati
Selective data outsourcing for enforcing privacy. J. Comput. Secur. 19 (3) (2011)
Anna Bernasconi, Valentina Ciriani
Dimension-reducible Boolean functions based on affine spaces. ACM Trans. Design Autom. Electr. Syst. 16 (2) (2011)
Anna Bernasconi, Valentina Ciriani
Compact and Testable Circuits for Regular Functions. ARCS Workshops (2011)
Anna Bernasconi, Valentina Ciriani, Valentino Liberali, Gabriella Trucco, Tiziano Villa
An approximation algorithm for cofactoring-based synthesis. ACM Great Lakes Symposium on VLSI (2011)
Anna Bernasconi, Valentina Ciriani
Autosymmetric Multiple-Valued Functions: Theory and Spectral Characterization. ISMVL (2011)
Valentina Ciriani, Sabrina De Capitani di Vimercati, Sara Foresti, Giovanni Livraga, Pierangela Samarati
Enforcing Confidentiality and Data Visibility Constraints: An OBDD Approach. DBSec (2011)
Anna Bernasconi, Valentina Ciriani
Logic synthesis and testability of D-reducible functions. VLSI-SoC (2010)
Valentina Ciriani, Sabrina De Capitani di Vimercati, Sara Foresti, Sushil Jajodia, Stefano Paraboschi, Pierangela Samarati
Combining fragmentation and encryption to protect privacy in data storage. ACM Trans. Inf. Syst. Secur. 13 (3) (2010)
Anna Bernasconi, Valentina Ciriani, Fabrizio Luccio, Linda Pagli
Fun at a Department Store: Data Mining Meets Switching Theory. FUN (2010)
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa
On decomposing Boolean functions via extended cofactoring. DATE (2009)
Valentina Ciriani, Sabrina De Capitani di Vimercati, Sara Foresti, Sushil Jajodia, Stefano Paraboschi, Pierangela Samarati
Enforcing Confidentiality Constraints on Sensitive Databases with Lightweight Trusted Clients. DBSec (2009)
Valentina Ciriani, Sabrina De Capitani di Vimercati, Sara Foresti, Sushil Jajodia, Stefano Paraboschi, Pierangela Samarati
Keep a Few: Outsourcing Data While Maintaining Confidentiality. ESORICS (2009)
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa
Logic Minimization and Testability of 2SPP-P-Circuits. DSD (2009)
Valentina Ciriani, Sabrina De Capitani di Vimercati, Sara Foresti, Sushil Jajodia, Stefano Paraboschi, Pierangela Samarati
Fragmentation Design for Efficient Query Execution over Sensitive Distributed Databases. ICDCS (2009)
Giorgio Boselli, Valentina Ciriani, Valentino Liberali, Gabriella Trucco
A Comparison between Two Logic Synthesis Forms from Digital Switching Noise Viewpoint. PATMOS (2008)
Anna Bernasconi, Valentina Ciriani, Roberto Cordone
On Projecting Sums of Products. DSD (2008)
Görschwin Fey, Anna Bernasconi, Valentina Ciriani, Rolf Drechsler
On the construction of small fully testable circuits with low depth. Microprocess. Microsystems 32 (5-6) (2008)
Anna Bernasconi, Valentina Ciriani, Roberto Cordone
The optimization of kEP-SOPs: Computational complexity, approximability and experiments. ACM Trans. Design Autom. Electr. Syst. 13 (2) (2008)
Anna Bernasconi, Valentina Ciriani, Rolf Drechsler, Tiziano Villa
Logic Minimization and Testability of 2-SPP Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (7) (2008)
Anna Bernasconi, Valentina Ciriani, Fabrizio Luccio, Linda Pagli
Synthesis of Autosymmetric Functions in a New Three-Level Form. Theory Comput. Syst. 42 (4) (2008)
Anna Bernasconi, Valentina Ciriani, Roberto Cordone
An approximation algorithm for fully testable kEP-SOP networks. ACM Great Lakes Symposium on VLSI (2007)
Valentina Ciriani, Sabrina De Capitani di Vimercati, Sara Foresti, Sushil Jajodia, Stefano Paraboschi, Pierangela Samarati
Fragmentation and Encryption to Enforce Privacy in Data Storage. ESORICS (2007)
Görschwin Fey, Anna Bernasconi, Valentina Ciriani, Rolf Drechsler
On the Construction of Small Fully Testable Circuits with Low Depth. DSD (2007)
Valentina Ciriani, Paolo Ferragina, Fabrizio Luccio, S. Muthukrishnan
A data structure for a sequence of string accesses in external memory. ACM Trans. Algorithms 3 (1) (2007)
Anna Bernasconi, Valentina Ciriani, Roberto Cordone
Logic Synthesis of EXOR Projected Sum of Products. VLSI-SoC (Selected Papers) (2006)
Anna Bernasconi, Valentina Ciriani, Rolf Drechsler, Tiziano Villa
Efficient minimization of fully testable 2-SPP networks. DATE (2006)
Valentina Ciriani, Anna Bernasconi, Rolf Drechsler
Testability of SPP Three-Level Logic Networks in Static Fault Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (10) (2006)
Anna Bernasconi, Valentina Ciriani, Roberto Cordone
EXOR Projected Sum of Products. VLSI-SoC (2006)
Anna Bernasconi, Valentina Ciriani, Fabrizio Luccio, Linda Pagli
Exploiting Regularities for Boolean Function Synthesis. Theory Comput. Syst. 39 (4) (2006)
Anna Bernasconi, Valentina Ciriani
DRedSOP: Synthesis of a New Class of Regular Functions. DSD (2006)
Valentina Ciriani, Nadia Pisanti, Anna Bernasconi
Room allocation: a polynomial subcase of the quadratic assignment problem. Discret. Appl. Math. 144 (3) (2004)
Anna Bernasconi, Valentina Ciriani, Fabrizio Luccio, Linda Pagli
Three-level logic minimization based on function regularities. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (8) (2003)
Valentina Ciriani, Fabrizio Luccio, Linda Pagli
Synthesis of integer multipliers in sum of pseudoproducts form. Integr. 36 (3) (2003)
Valentina Ciriani
Synthesis of SPP three-level logic networks using affine spaces. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (10) (2003)
Valentina Ciriani, Anna Bernasconi, Rolf Drechsler
Testability of SPP Three-Level Logic Networks. VLSI-SOC (2003)
Valentina Ciriani, Anna Bernasconi, Rolf Drechsler
Stuck-At-Fault Testability of SPP Three-Level Logic Forms. VLSI-SoC (Selected Papers) (2003)
Anna Bernasconi, Valentina Ciriani, Fabrizio Luccio, Linda Pagli
Fast three-level logic minimization based on autosymmetry. DAC (2002)
Anna Bernasconi, Valentina Ciriani, Fabrizio Luccio, Linda Pagli
Implicit Test of Regularity for Not Completely Specified Boolean Functions. IWLS (2002)
Valentina Ciriani, Paolo Ferragina, Fabrizio Luccio, S. Muthukrishnan
Static Optimality Theorem for External Memory String Access. FOCS (2002)
Valentina Ciriani
Logic Minimization using Exclusive OR Gates. DAC (2001)