Rolf Drechsler

ORCID

Publication Activity (10 Years)

Years Active: 1992-2024
Publications (10 Years): 431

Top Venues

Goethe University Frankfurt am Main (PHD)

Education History

Goethe University Frankfurt am Main

PHD

Publications

Abhoy Kole, Arighna Deb, Kamalika Datta, Rolf Drechsler
Dynamic Realization of Multiple Control Toffoli Gate. DATE (2024)
Chandan Kumar Jha, Sallar Ahmadi-Pour, Rolf Drechsler
Input Distribution Aware Library of Approximate Adders Based on Memristor-Aided Logic. VLSID (2024)
Mohamed Nadeem, Chandan Kumar Jha, Rolf Drechsler
Polynomial Formal Verification of Approximate Adders with Constant Cutwidth. ETS (2024)
Ankit Bende, Simranjeet Singh, Chandan Kumar Jha, Tim Kempen, Felix Cüppers, Christopher Bengel, Andre Zambanini, Dennis Nielinger, Sachin B. Patkar, Rolf Drechsler, Rainer Waser, Farhad Merchant, Vikas Rana
Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array. VLSID (2024)
Muhammad Hassan, Sallar Ahmadi-Pour, Khushboo Qayyum, Chandan Kumar Jha, Rolf Drechsler
LLM-Guided Formal Verification Coupled with Mutation Testing. DATE (2024)
Khushboo Qayyum, Abhoy Kole, Kamalika Datta, Muhammad Hassan, Rolf Drechsler
Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification. ACM Great Lakes Symposium on VLSI (2024)
Jan Zielasko, Rune Krauss, Marcel Merten, Rolf Drechsler
Improving Virtual Prototype Driven Hardware Optimization by Merging Instruction Sequences. DDECS (2024)
Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant
MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory. ASPDAC (2024)
Payam Habiby, Fatemeh Shirinzadeh, Sebastian Huhn, Rolf Drechsler
A Multi-Objective Evolutionary Approach for Test Network Design. ETS (2024)
Simranjeet Singh, Ankit Bende, Chandan Kumar Jha, Vikas Rana, Rolf Drechsler, Sachin B. Patkar, Farhad Merchant
In-Memory Mirroring: Cloning Without Reading. CoRR (2024)
Bernhard Johannes Berger, Christina Plump, Lauren Paul, Rolf Drechsler
EvoAl - Codeless Domain-Optimisation. GECCO Companion (2024)
Sören Tempel, Tobias Brandt, Christoph Lüth, Rolf Drechsler
BinSym: Binary-Level Symbolic Execution using Formal Descriptions of Instruction Semantics. CoRR (2024)
Ruidi Qiu, Grace Li Zhang, Rolf Drechsler, Ulf Schlichtmann, Bing Li
AutoBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design. CoRR (2024)
Liam Hurwitz, Kamalika Datta, Abhoy Kole, Rolf Drechsler
Is Simulation the only Alternative for Effective Verification of Dynamic Quantum Circuits? RC (2024)
Lennart Weingarten, Kamalika Datta, Abhoy Kole, Rolf Drechsler
Complete and Efficient Verification for a RISC-V Processor Using Formal Verification. DATE (2024)
Christina Plump, Daniel Christopher Hoinkiss, Jörn Huber, Bernhard J. Berger, Matthias Günther, Christoph Lüth, Rolf Drechsler
Finding the perfect MRI sequence for your patient - Towards an optimisation workflow for MRI-sequences. CEC (2024)
Sajjad Parvin, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
Hidden Cost of Circuit Design with RFETs. DATE (2024)
Sneha Lahiri, Megha Kesh, Rupsa Mandal, Anirban Bhattacharjee, Sovan Bhattacharya, Dola Sinha, Chandan Bandyopadhyay, Laxmidhar Biswal, Robert Wille, Rolf Drechsler
A Dynamic Programming Based Graph Traversal Approach for Efficient Implementation of Nearest Neighbor Architecture in 2D. VLSID (2024)
Ece Nur Demirhan Coskun, Sallar Ahmadi-Pour, Muhammad Hassan, Rolf Drechsler
Security Coverage Metrics for Information Flow at the System Level. ASPDAC (2024)
Caroline Dominik, Rolf Drechsler
Polynomial Formal Verification of Sequential Circuits. DATE (2024)
Chandan Kumar Jha, Muhammad Hassan, Rolf Drechsler
cecApprox: Enabling Automated Combinational Equivalence Checking for Approximate Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (7) (2024)
Fatemeh Shirinzadeh, Arighna Deb, Saeideh Shirinzadeh, Abhoy Kole, Kamalika Datta, Rolf Drechsler
In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures. VLSID (2024)
Milan Funck, Sallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler
Identification of ISA-Level Mutation-Classes for Qualification of RISC-V Formal Verification. FDL (2023)
Payam Habiby, Sebastian Huhn, Rolf Drechsler
RC-IJTAG: A Methodology for Designing Remotely-Controlled IEEE 1687 Scan Networks. DFT (2023)
Sallar Ahmadi-Pour, Pascal Pieper, Rolf Drechsler
Virtual-Peripheral-in-the-Loop : A Hardware-in-the-Loop Strategy to Bridge the VP/RTL Design-Gap. CoRR (2023)
Abhoy Kole, Kamalika Datta, Philipp Niemann, Indranil Sengupta, Rolf Drechsler
Exploiting the Benefits of Clean Ancilla Based Toffoli Gate Decomposition Across Architectures. RC (2023)
Chandan Kumar Jha, Rolf Drechsler
Benchmarking Multiplier Architectures for MAGIC Based In-Memory Computing. NEWCAS (2023)
Kamalika Datta, Rolf Drechsler
Memristors: Device Modeling, Design and Verification. iSES (2023)
Simranjeet Singh, Omar Ghazal, Chandan Kumar Jha, Vikas Rana, Rolf Drechsler, Rishad A. Shafik, Alex Yakovlev, Sachin B. Patkar, Farhad Merchant
Finite State Automata Design using 1T1R ReRAM Crossbar. NEWCAS (2023)
Sören Tempel, Vladimir Herdt, Rolf Drechsler
Specification-Based Symbolic Execution for Stateful Network Protocol Implementations in IoT. IEEE Internet Things J. 10 (11) (2023)
Payam Habiby, Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich, Sebastian Huhn, Rolf Drechsler
Synthesis of IJTAG Networks for Multi-Power Domain Systems on Chips. ETS (2023)
Sören Tempel, Tobias Brandt, Christoph Lüth, Rolf Drechsler
Minimally Invasive Generation of RISC-V Instruction Set Simulators from Formal ISA Models. FDL (2023)
Mohamed Nadeem, Jan Kleinekathöfer, Rolf Drechsler
Polynomial Formal Verification exploiting Constant Cutwidth. RSP (2023)
Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler
FELOPi: A Framework for Simulation and Evaluation of Post-Layout File Against Optical Probing. DATE (2023)
Ankit Bende, Simranjeet Singh, Chandan Kumar Jha, Tim Kempen, Felix Cüppers, Christopher Bengel, Andre Zambanini, Dennis Nielinger, Sachin B. Patkar, Rolf Drechsler, Rainer Waser, Farhad Merchant, Vikas Rana
Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array. CoRR (2023)
Kamalika Datta, Arighna Deb, Fatemeh Shirinzadeh, Abhoy Kole, Saeideh Shirinzadeh, Rolf Drechsler
Verification of In-Memory Logic Design using ReRAM Crossbars. NEWCAS (2023)
Jens Trommer, N. Bhattacharjee, Thomas Mikolajick, S. Huhn, Marcel Merten, M. E. Djeridane, Muhammad Hassan, Rolf Drechsler, S. Rai, N. Kavand, A. Darjani, A. Kumar, V. Sessi, M. Drescher, S. Kolodinski, M. Wiatr
Design Enablement Flow for Circuits with Inherent Obfuscation based on Reconfigurable Transistors. DATE (2023)
Weiyan Zhang, Mehran Goli, Muhammad Hassan, Rolf Drechsler
Efficient ML-Based Performance Estimation Approach Across Different Microarchitectures for RISC-V Processors. DSD (2023)
Ece Nur Demirhan Coskun, Muhammad Hassan, Mehran Goli, Rolf Drechsler
VAST: Validation of VP-based Heterogeneous Systems against Availability Security Properties using Static Information Flow Tracking. ISQED (2023)
Arighna Deb, Kamalika Datta, Muhammad Hassan, Saeideh Shirinzadeh, Rolf Drechsler
Automated Equivalence Checking Method for Majority Based In-Memory Computing on ReRAM Crossbars. ASP-DAC (2023)
Marcel Merten, Sebastian Huhn, Rolf Drechsler
Increasing SAT-Resilience of Logic Locking Mechanisms using Formal Methods. ETS (2023)
Christopher A. Metz, Mehran Goli, Rolf Drechsler
Fast and Accurate: Machine Learning Techniques for Performance Estimation of CNNs for GPGPUs. IPDPS Workshops (2023)
Marcel Merten, Rune Krauss, Rolf Drechsler
Scalable Neuroevolution of Ensemble Learners. GECCO Companion (2023)
Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler
Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans - A RISC-V Case Study. ASP-DAC (2023)
Jan Zielasko, Rolf Drechsler
Virtual Prototype Driven Application Specific Hardware Optimization. FDL (2023)
Abhoy Kole, Arighna Deb, Kamalika Datta, Rolf Drechsler
Extending the Design Space of Dynamic Quantum Circuits for Toffoli based Network. DATE (2023)
Rolf Drechsler, Martha Schnieber
Automated Polynomial Formal Verification: Human-Readable Proof Generation. iSES (2023)
Lennart Weingarten, Kamalika Datta, Rolf Drechsler
PolyMiR: Polynomial Formal Verification of the MicroRV32 Processor. NANOARCH (2023)
Jan Kleinekathöfer, Alireza Mahzoon, Rolf Drechsler
Polynomial Formal Verification of Floating Point Adders. DATE (2023)
Simranjeet Singh, Omar Ghazal, Chandan Kumar Jha, Vikas Rana, Rolf Drechsler, Rishad A. Shafik, Alex Yakovlev, Sachin Patkar, Farhad Merchant
Finite State Automata Design using 1T1R ReRAM Crossbar. CoRR (2023)
Rune Krauss, Mehran Goli, Rolf Drechsler
Efficient Binary Decision Diagram Manipulation by Reducing the Number of Intermediate Nodes. DDECS (2023)
Rolf Drechsler, Martha Schnieber
Next-Generation Automatic Human-Readable Proofs Enabling Polynomial Formal Verification. MEMOCODE (2023)
Alireza Mahzoon, Rolf Drechsler
Polynomial Formal Verification of Complex Circuits Using a Hybrid Proof Engine. Applicable Formal Methods for Safe Industrial Products (2023)
Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Phrangboklang Lyngton Thangkhiew, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant
Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style. CoRR (2023)
Lennart Weingarten, Alireza Mahzoon, Mehran Goli, Rolf Drechsler
Polynomial Formal Verification of a Processor: A RISC-V Case Study. ISQED (2023)
Martha Schnieber, Rolf Drechsler
Polynomial Formal Verification of KFDD Circuits. MEMOCODE (2023)
Lena Steinmann, Dirk Nowotka, Lea Oberländer, Helen Pfuhl, Heiner Stuckenschmidt, Rolf Drechsler
Workshop: "Aktuelle Entwicklungen und Perspektiven (an Hochschulen) im Bereich Data Science". GI-Jahrestagung (2023)
Sajjad Parvin, Mehran Goli, Thilo Krachenfels, Shahin Tajik, Jean-Pierre Seifert, Frank Sill Torres, Rolf Drechsler
LAT-UP: Exposing Layout-Level Analog Hardware Trojans Using Contactless Optical Probing. ISVLSI (2023)
Chandan Kumar Jha, Sallar Ahmadi-Pour, Rolf Drechsler
MARADIV: Library of MAGIC-Based Approximate Restoring Array Divider Benchmark Circuits for In-Memory Computing Using Memristors. IEEE Trans. Circuits Syst. II Express Briefs 70 (7) (2023)
Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant
MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory. CoRR (2023)
Tim Meywerk, Vladimir Herdt, Rolf Drechsler
Coverage-Guided Fuzzing for Plan-Based Robotics. ICAART (2) (2023)
Rune Krauss, Mehran Goli, Rolf Drechsler
EDDY: A Multi-Core BDD Package with Dynamic Memory Management and Reduced Fragmentation. ASP-DAC (2023)
Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Phrangboklang Lyngton Thangkhiew, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant
Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style. IEEE Embed. Syst. Lett. 15 (4) (2023)
Christopher A. Metz, Christina Plump, Bernhard J. Berger, Rolf Drechsler
Hybrid PTX Analysis for GPU accelerated CNN inferencing aiding Computer Architecture Design. FDL (2023)
Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler
Improved Cost-Metric for Nearest Neighbor Mapping of Quantum Circuits to 2-Dimensional Hexagonal Architecture. RC (2023)
Kamalika Datta, Arighna Deb, Abhoy Kole, Rolf Drechsler
Impact of sneak paths on in-memory logic design in memristive crossbars. it Inf. Technol. 65 (1-2) (2023)
Christina Plump, Bernhard J. Berger, Rolf Drechsler
Repetitive Processes and Their Surrogate-Model Congruent Encoding for Evolutionary Algorithms - A Theoretic Proposal. GECCO Companion (2023)
Kemal Çaglar Coskun, Muhammad Hassan, Rolf Drechsler
Equivalence Checking of System-Level and SPICE-Level Models of Static Nonlinear Circuits. DATE (2023)
Rolf Drechsler, Alireza Mahzoon
Towards Polynomial Formal Verification of AI-Generated Arithmetic Circuits. ISDCS (2023)
Sana Hassan Imam, Christopher A. Metz, Lars Hornuf, Rolf Drechsler
Classifying Crowdsouring Platform Users' Engagement Behaviour using Machine Learning and XAI. MuC (Workshopband) (2023)
Niklas Bruns, Vladimir Herdt, Rolf Drechsler
Processor Verification using Symbolic Execution: A RISC-V Case-Study. DATE (2023)
Sajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
Lo-RISK: Design of a Low Optical Leakage and High Performance RISC-V Core. COINS (2023)
Marcel Merten, Muhammad Hassan, Rolf Drechsler
Quality Assessment of Logic Locking Mechanisms using Pseudo-Boolean Optimization Techniques. DDECS (2023)
Rolf Drechsler, Alireza Mahzoon
Divide and Verify: Using a Divide-and-Conquer Strategy for Polynomial Formal Verification of Complex Circuits. DATE (2023)
Niklas Bruns, Vladimir Herdt, Rolf Drechsler
Unified HW/SW Coverage: A Novel Metric to Boost Coverage-guided Fuzzing for Virtual Prototype based HW/SW Co-Verification. FDL (2022)
Saman Fröhlich, Rolf Drechsler
Unlocking approximation for in-memory computing with Cartesian genetic programming and computer algebra for arithmetic circuits. it Inf. Technol. 64 (3) (2022)
Weiyan Zhang, Mehran Goli, Rolf Drechsler
Early Performance Estimation of Embedded Software on RISC-V Processor using Linear Regression. DDECS (2022)
Sallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler
The MicroRV32 framework: An accessible and configurable open source RISC-V cross-level platform for education and research. J. Syst. Archit. 133 (2022)
Christopher A. Metz, Mehran Goli, Rolf Drechsler
Towards Neural Hardware Search: Power Estimation of CNNs for GPGPUs with Dynamic Frequency Scaling. MLCAD (2022)
Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler
Nearest Neighbor Mapping of Quantum Circuits to Two-Dimensional Hexagonal Qubit Architecture. ISMVL (2022)
Wolfgang Ecker, Peer Adelt, Wolfgang Müller, Reinhold Heckmann, Milos Krstic, Vladimir Herdt, Rolf Drechsler, Gerhard Angst, Ralf Wimmer, Andreas Mauderer, Rafael Stahl, Karsten Emrich, Daniel Mueller-Gritschneder, Bernd Becker, Philipp Scholl, Eyck Jentzsch, Jan Schlamelcher, Kim Grüttner, Paul Palomero Bernardo, Oliver Bringmann, Mihaela Damian, Julian Oppermann, Andreas Koch, Jörg Bormann, Johannes Partzsch, Christian Mayr, Wolfgang Kunz
The Scale4Edge RISC-V Ecosystem. DATE (2022)
Kamalika Datta, Saman Fröhlich, Saeideh Shirinzadeh, Dev Narayan Yadav, Indranil Sengupta, Rolf Drechsler
Unlocking High Resolution Arithmetic Operations within Memristive Crossbars for Error Tolerant Applications. VLSI-SoC (2022)
Martha Schnieber, Saman Fröhlich, Rolf Drechsler
Polynomial Formal Verification of Approximate Functions. ISVLSI (2022)
Christopher A. Metz, Mehran Goli, Rolf Drechsler
ML-based Power Estimation of Convolutional Neural Networks on GPGPUs. DDECS (2022)
Rolf Drechsler, Alireza Mahzoon
Preserving Design Hierarchy Information for Polynomial Formal Verification. VLSI-SoC (2022)
Rolf Drechsler, Alireza Mahzoon, Mehran Goli
Towards Polynomial Formal Verification of Complex Arithmetic Circuits. DDECS (2022)
Jan Kleinekathöfer, Alireza Mahzoon, Rolf Drechsler
Lower Bound Proof for the Size of BDDs representing a Shifted Addition. CoRR (2022)
Sören Tempel, Vladimir Herdt, Rolf Drechsler
Automated Detection of Spatial Memory Safety Violations for Constrained Devices. ASP-DAC (2022)
Alireza Mahzoon, Daniel Große, Christoph Scholl, Alexander Konrad, Rolf Drechsler
Formal verification of modular multipliers using symbolic computer algebra and boolean satisfiability. DAC (2022)
Kemal Çaglar Coskun, Muhammad Hassan, Rolf Drechsler
Equivalence Checking of System-Level and SPICE-Level Models of Linear Analog Filters. DDECS (2022)
Alexander Konrad, Christoph Scholl, Alireza Mahzoon, Daniel Große, Rolf Drechsler
Divider Verification Using Symbolic Computer Algebra and Delayed Don't Care Optimization. FMCAD (2022)
Sören Tempel, Vladimir Herdt, Rolf Drechsler
SISL: Concolic Testing of Structured Binary Input Formats via Partial Specification. ATVA (2022)
Saman Fröhlich, Rolf Drechsler
LiM-HDL: HDL-Based Synthesis for In-Memory Computing. DATE (2022)
Saman Fröhlich, Saeideh Shirinzadeh, Rolf Drechsler
Parallel Computing of Graph-based Functions in ReRAM. ACM J. Emerg. Technol. Comput. Syst. 18 (2) (2022)
Tim Meywerk, Arthur Niedzwiecki, Vladimir Herdt, Rolf Drechsler
Simulation-Based Debugging of Formal Environment Models. MED (2022)
Mehran Goli, Rolf Drechsler
Simulation-based Verification of SystemC-based VPs at the ESL. CoRR (2022)
Niklas Bruns, Vladimir Herdt, Eyck Jentzsch, Rolf Drechsler
Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging. DATE (2022)
Christina Plump, Bernhard J. Berger, Rolf Drechsler
Adapting mutation and recombination operators to range-aware relations in real-world application data. GECCO Companion (2022)
Görschwin Fey, Martin Fränzle, Rolf Drechsler
Self-Explanation in Systems of Systems. RE Workshops (2022)
Sajjad Parvin, Thilo Krachenfels, Shahin Tajik, Jean-Pierre Seifert, Frank Sill Torres, Rolf Drechsler
Toward Optical Probing Resistant Circuits: A Comparison of Logic Styles and Circuit Design Techniques. ASP-DAC (2022)

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Publication Activity (10 Years)

Top Topics

Top Venues

Rolf Drechsler