Indranil Sengupta

ORCID

Publication Activity (10 Years)

Years Active: 1994-2023
Publications (10 Years): 52

Top Venues

VLSI Design

IEEE Trans. Very Large Scale Integr. Syst.

J. Circuits Syst. Comput.

Publications

Abhoy Kole, Kamalika Datta, Philipp Niemann, Indranil Sengupta, Rolf Drechsler
Exploiting the Benefits of Clean Ancilla Based Toffoli Gate Decomposition Across Architectures. RC (2023)
Dev Narayan Yadav, Phrangboklang Lyngton Thangkhiew, Indranil Sengupta
An Analysis of Fault Diagnosis Approaches in Memristor Crossbar Array. iSES (2023)
Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler
Improved Cost-Metric for Nearest Neighbor Mapping of Quantum Circuits to 2-Dimensional Hexagonal Architecture. RC (2023)
Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler
Nearest Neighbor Mapping of Quantum Circuits to Two-Dimensional Hexagonal Qubit Architecture. ISMVL (2022)
Kamalika Datta, Saman Fröhlich, Saeideh Shirinzadeh, Dev Narayan Yadav, Indranil Sengupta, Rolf Drechsler
Unlocking High Resolution Arithmetic Operations within Memristive Crossbars for Error Tolerant Applications. VLSI-SoC (2022)
Habibur Rahaman, Santanu Chattopadhyay, Indranil Sengupta, Debesh K. Das, Bhargab B. Bhattacharya
Easily-Verifiable Design of Non-Scan Sequential Machines for Conformance Checking. VLSID (2022)
Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler
Mapping Quantum Circuits to 2-Dimensional Quantum Architectures. GI-Jahrestagung (2022)
Abhoy Kole, Kamalika Datta, Indranil Sengupta, Rolf Drechsler
SAT-based Exact Synthesis of Ternary Reversible Circuits using a Functionally Complete Gate Library. DSD (2022)
F. Lalchhandama, Mukesh Sahani, Vompolu Mohan Srinivas, Indranil Sengupta, Kamalika Datta
In-Memory Computing on Resistive RAM Systems Using Majority Operation. J. Circuits Syst. Comput. 31 (4) (2022)
Habibur Rahaman, Santanu Chattopadhyay, Indranil Sengupta
Conformance Testing for Finite State Machines Guided by Deep Neural Network. J. Circuits Syst. Comput. 31 (9) (2022)
Dev Narayan Yadav, Phrangboklang Lyngton Thangkhiew, Kamalika Datta, Sandip Chakraborty, Rolf Drechsler, Indranil Sengupta
Feed-Forward learning algorithm for resistive memories. J. Syst. Archit. 131 (2022)
Kamalika Datta, Saeideh Shirinzadeh, Phrangboklang Lyngton Thangkhiew, Indranil Sengupta, Rolf Drechsler
Unlocking Sneak Path Analysis in Memristor Based Logic Design Styles. DSD (2022)
F. Lalchhandama, Kamalika Datta, Sandip Chakraborty, Rolf Drechsler, Indranil Sengupta
CoMIC: Complementary Memristor based in-memory computing in 3D architecture. J. Syst. Archit. 126 (2022)
Dev Narayan Yadav, Phrangboklang Lyngton Thangkhiew, Kamalika Datta, Sandip Chakraborty, Rolf Drechsler, Indranil Sengupta
FAMCroNA: Fault Analysis in Memristive Crossbars for Neuromorphic Applications. J. Electron. Test. 38 (2) (2022)
Lukas Burgholzer, Rudy Raymond, Indranil Sengupta, Robert Wille
Efficient Construction of Functional Representations for Quantum Algorithms. CoRR (2021)
Lukas Burgholzer, Rudy Raymond, Indranil Sengupta, Robert Wille
Efficient Construction of Functional Representations for Quantum Algorithms. RC (2021)
Habibur Rahaman, Santanu Chattopadhyay, Indranil Sengupta
A Deep Neural Network Guided Testing Approach for Finite State Machines. ISDCS (2021)
Hillol Maity, Kaushik Khatua, Santanu Chattopadhyay, Indranil Sengupta, Girish Patankar, Parthajit Bhattacharya
A New Test Vector Reordering Technique for Low Power Combinational Circuit Testing. ISDCS (2020)
Ayantika Chatterjee, Indranil Sengupta
Sorting of Fully Homomorphic Encrypted Cloud Data: Can Partitioning be Effective? IEEE Trans. Serv. Comput. 13 (3) (2020)
Abhoy Kole, Stefan Hillmich, Kamalika Datta, Robert Wille, Indranil Sengupta
Improved Mapping of Quantum Circuits to IBM QX Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (10) (2020)
Phrangboklang Lyngton Thangkhiew, Alwin Zulehner, Robert Wille, Kamalika Datta, Indranil Sengupta
An efficient memristor crossbar architecture for mapping Boolean functions using Binary Decision Diagrams (BDD). Integr. 71 (2020)
Kanchan Manna, Chatla Swami Sagar, Santanu Chattopadhyay, Indranil Sengupta
Thermal-aware Test Scheduling Strategy for Network-on-Chip based Systems. ACM J. Emerg. Technol. Comput. Syst. 15 (1) (2019)
Naveen Murali G, Peddireddi Satya Vardhan, F. Lalchhandama, Kamalika Datta, Indranil Sengupta
Mapping of Boolean Logic Functions onto 3D Memristor Crossbar. VLSI Design (2019)
Yaswanth Krishna Yadav Danaboina, Pravanjan Samanta, Kamalika Datta, Indrajit Chakrabarti, Indranil Sengupta
Design and Implementation of Threshold Logic Functions Using Memristors. VLSI Design (2019)
Tathagato Bose, Kamalika Datta, Indranil Sengupta
Exploiting Negative Control Lines and Nearest Neighbor for Improved Comparator Design. VLSI Design (2019)
Varsha Agarwal, Ananya Singla, Mahammad Samiuddin, Sudip Roy, Tsung-Yi Ho, Indranil Sengupta, Bhargab B. Bhattacharya
Scheduling algorithms for reservoir- and mixer-aware sample preparation with microfluidic biochips. Integr. 65 (2019)
Alwin Zulehner, Kamalika Datta, Indranil Sengupta, Robert Wille
A staircase structure for scalable and efficient synthesis of memristor-aided logic. ASP-DAC (2019)
Hillol Maity, Kaushik Khatua, Santanu Chattopadhyay, Indranil Sengupta, Girish Patankar, Parthajit Bhattacharya
Fault Coverage Enhancement via Weighted Random Pattern Generation in BIST Using a DNN-Driven-PSO Approach. ICIT (2019)
Kaushik Khatua, Hillol Maity, Santanu Chattopadhyay, Indranil Sengupta, Girish Patankar, Parthajit Bhattacharya
A Deep Neural Network Augmented Approach for Fixed Polarity AND-XOR Network Synthesis. TENCON (2019)
Abhoy Kole, Kamalika Datta, Indranil Sengupta
A New Heuristic for N-Dimensional Nearest Neighbor Realization of a Quantum Circuit. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (1) (2018)
Rahul Gharpinde, Phrangboklang Lyngton Thangkhiew, Kamalika Datta, Indranil Sengupta
A Scalable In-Memory Logic Synthesis Approach Using Memristor Crossbar. IEEE Trans. Very Large Scale Integr. Syst. 26 (2) (2018)
Alwin Zulehner, P. Mercy Nesa Rani, Kamalika Datta, Indranil Sengupta, Robert Wille
Generalizing the Concept of Scalable Reversible Circuit Synthesis for Multiple-Valued Logic. ISMVL (2018)
Ayantika Chatterjee, Indranil Sengupta
Translating Algorithms to Handle Fully Homomorphic Encrypted Data on the Cloud. IEEE Trans. Cloud Comput. 6 (1) (2018)
Naveen Murali G, F. Lalchhandama, Kamalika Datta, Indranil Sengupta
Modelling and Simulation of Non-Ideal MAGIC NOR Gates on Memristor Crossbar. ISED (2018)
Atanu Basu, Indranil Sengupta
Secure Cloud Storage Scheme Based On Hybrid Cryptosystem. IACR Cryptol. ePrint Arch. 2018 (2018)
Kanchan Manna, Priyajit Mukherjee, Santanu Chattopadhyay, Indranil Sengupta
Thermal-Aware Application Mapping Strategy for Network-on-Chip Based System Design. IEEE Trans. Computers 67 (4) (2018)
Varsha Agarwal, Ananya Singla, Mahammad Samiuddin, Sudip Roy, Tsung-Yi Ho, Indranil Sengupta, Bhargab B. Bhattacharya
Reservoir and mixer constrained scheduling for sample preparation on digital microfluidic biochips. ASP-DAC (2017)
Bibhas Ghoshal, Chittaranjan Mandal, Indranil Sengupta
Refresh re-use based transparent test for detection of in-field permanent faults in DRAMs. Integr. 59 (2017)
Subhasish Dhal, Indranil Sengupta
A New Object Searching Protocol for Multi-tag RFID. Wirel. Pers. Commun. 97 (3) (2017)
Abhoy Kole, P. Mercy Nesa Rani, Kamalika Datta, Indranil Sengupta, Rolf Drechsler
Exact Synthesis of Ternary Reversible Functions Using Ternary Toffoli Gates. ISMVL (2017)
Abhoy Kole, Robert Wille, Kamalika Datta, Indranil Sengupta
Test Pattern Generation Effort Evaluation of Reversible Circuits. RC (2017)
P. Mercy Nesa Rani, Abhoy Kole, Kamalika Datta, Indranil Sengupta
Improved Decomposition of Multiple-Control Ternary Toffoli Gates Using Muthukrishnan-Stroud Quantum Gates. RC (2017)
Leniency Marbaniang, Abhoy Kole, Kamalika Datta, Indranil Sengupta
Design of Efficient Quantum Circuits Using Nearest Neighbor Constraint in 2D Architecture. RC (2017)
Rajit Karmakar, N. Prasad, Santanu Chattopadhyay, Rohit Kapur, Indranil Sengupta
A New Logic Encryption Strategy Ensuring Key Interdependency. VLSI Design (2017)
Anupam Bhar, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
Small Test Set Generation with High Diagnosability. J. Circuits Syst. Comput. 25 (4) (2016)
Abhoy Kole, Kamalika Datta, Indranil Sengupta
A Heuristic for Linear Nearest Neighbor Realization of Quantum Circuits by SWAP Gate Insertion Using N-Gate Lookahead. IEEE J. Emerg. Sel. Topics Circuits Syst. 6 (1) (2016)
Kanchan Manna, Santanu Chattopadhyay, Indranil Sengupta
Thermal-Aware Design and Test Techniques for Two-and Three-Dimensional Networks-on-Chip. ISVLSI (2016)
Shuchishman Burman, Kamalika Datta, Robert Wille, Indranil Sengupta, Rolf Drechsler
An improved gate library for logic synthesis of optical circuits. ISED (2016)
Bibhas Ghoshal, Kanchan Manna, Santanu Chattopadhyay, Indranil Sengupta
In-Field Test for Permanent Faults in FIFO Buffers of NoC Routers. IEEE Trans. Very Large Scale Integr. Syst. 24 (1) (2016)
Kanchan Manna, Shivam Swami, Santanu Chattopadhyay, Indranil Sengupta
Integrated Through-Silicon Via Placement and Application Mapping for 3D Mesh-Based NoC Design. ACM Trans. Embed. Comput. Syst. 16 (1) (2016)
Kanchan Manna, Chatla Swamy Sagar, Santanu Chattopadhyay, Indranil Sengupta
Thermal-Aware Preemptive Test Scheduling for Network-on-Chip Based 3D ICs. ISVLSI (2016)
Phrangboklang Lyngton Thangkhiew, Rahul Gharpinde, Varun Chowdhary Paturi, Kamalika Datta, Indranil Sengupta
Area efficient implementation of ripple carry adder using memristor crossbar arrays. IDT (2016)
Kanchan Manna, Vadapalli Shanmukha Sri Teja, Santanu Chattopadhyay, Indranil Sengupta
TSV Placement and Core Mapping for 3D Mesh Based Network-on-Chip Design Using Extended Kernighan-Lin Partitioning. ISVLSI (2015)
Eleonora Schönborn, Kamalika Datta, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
BDD-Based Synthesis for All-Optical Mach-Zehnder Interferometer Circuits. VLSI Design (2015)
Ayantika Chatterjee, Indranil Sengupta
Searching and Sorting of Fully Homomorphic Encrypted Data on Cloud. IACR Cryptol. ePrint Arch. 2015 (2015)
Ayantika Chatterjee, Indranil Sengupta
FURISC: FHE Encrypted URISC Design. IACR Cryptol. ePrint Arch. 2015 (2015)
Ritu Ranjan Shrivastwa, Kamalika Datta, Indranil Sengupta
Fast Qubit Placement in 2D Architecture Using Nearest Neighbor Realization. iNIS (2015)
Kamalika Datta, Tanay Chattopadhyay, Indranil Sengupta
All optical design of binary adders using semiconductor optical amplifier assisted Mach-Zehnder interferometer. Microelectron. J. 46 (9) (2015)
Ayantika Chatterjee, Indranil Sengupta
Windowing technique for Lazy Sorting of Encrypted data. CNS (2015)
Bodhisatwa Mazumdar, Debdeep Mukhopadhyay, Indranil Sengupta
Construction of RSBFs with improved cryptographic properties to resist differential fault attack on grain family of stream ciphers. Cryptogr. Commun. 7 (1) (2015)
Kanchan Manna, Chakradhar Reddy Veeramreddy, Santanu Chattopadhyay, Indranil Sengupta
Thermal-aware multifrequency network-on-chip testing using particle swarm optimisation. Int. J. High Perform. Syst. Archit. 5 (3) (2015)
Anupam Bhar, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
GA based diagnostic test pattern generation for transition faults. VDAT (2015)
Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
Scan Chain Masking for Diagnosis of Multiple Chain Failures in a Space Compaction Environment. IEEE Trans. Very Large Scale Integr. Syst. 23 (7) (2015)
Kamalika Datta, Indranil Sengupta, Hafizur Rahaman
A Post-Synthesis Optimization Technique for Reversible Circuits Exploiting Negative Control Lines. IEEE Trans. Computers 64 (4) (2015)
Abhoy Kole, Kamalika Datta, Indranil Sengupta, Robert Wille
Towards a Cost Metric for Nearest Neighbor Constraints in Reversible Circuits. RC (2015)
Kamalika Datta, Indranil Sengupta
All Optical Reversible Multiplexer Design Using Mach-Zehnder Interferometer. VLSI Design (2014)
Kamalika Datta, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
An Approach to Reversible Logic Synthesis Using Input and Output Permutations. Trans. Comput. Sci. 24 (2014)
Sayak Chakraborti, Paturi Varun Chowdhary, Kamalika Datta, Indranil Sengupta
BDD based synthesis of Boolean functions using memristors. IDT (2014)
Kamalika Datta, Alhaad Gokhale, Indranil Sengupta, Hafizur Rahaman
An ESOP-Based Reversible Circuit Synthesis Flow Using Simulated Annealing. ACSS (2) (2014)
Eleonora Schönborn, Kamalika Datta, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
Optimizing DD-based synthesis of reversible circuits using negative control lines. DDECS (2014)
Pushpita Chatterjee, Uttam Ghosh, Indranil Sengupta, Soumya Kanti Ghosh
Approach for modelling trust in cluster-based wireless ad hoc networks. IET Networks 3 (3) (2014)
Kanchan Manna, Santanu Chattopadhyay, Indranil Sengupta
Through silicon via placement and mapping strategy for 3D mesh based Network-on-Chip. VLSI-SoC (2014)
Pushpita Chatterjee, Uttam Ghosh, Indranil Sengupta, Soumya Kanti Ghosh
A trust enhanced secure clustering framework for wireless ad hoc networks. Wirel. Networks 20 (7) (2014)
Kamalika Datta, Gaurav Rathi, Indranil Sengupta, Hafizur Rahaman
An Improved Reversible Circuit Synthesis Approach using Clustering of ESOP Cubes. ACM J. Emerg. Technol. Comput. Syst. 11 (2) (2014)
Subhadip Kundu, Aniket Jha, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
Framework for Multiple-Fault Diagnosis Based on Multiple Fault Simulation Using Particle Swarm Optimization. IEEE Trans. Very Large Scale Integr. Syst. 22 (3) (2014)
Kamalika Datta, Indranil Sengupta
Partial encryption and watermarking scheme for audio files with controlled degradation of quality. Multim. Tools Appl. 64 (3) (2013)
Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
Aggresive scan chain masking for improved diagnosis of multiple scan chain failures. ETS (2013)
Bodhisatwa Mazumdar, Debdeep Mukhopadhyay, Indranil Sengupta
Constrained Search for a Class of Good Bijective S-Boxes With Improved DPA Resistivity. IEEE Trans. Inf. Forensics Secur. 8 (12) (2013)
Monjur Alam, Santosh Ghosh, Dipanwita Roy Chowdhury, Indranil Sengupta
First-order DPA Vulnerability of Rijndael: Security and Area-delay Optimization Trade-off. Int. J. Netw. Secur. 15 (3) (2013)
Subhadip Kundu, Sankhadeep Pal, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
A Metric for Test Set Characterization and Customization Toward Fault Diagnosis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (11) (2013)
Bibhas Ghoshal, Chittaranjan Mandal, Indranil Sengupta
Re-using Refresh for Self-Testing DRAMs. ISED (2013)
Kamalika Datta, Indranil Sengupta, Hafizur Rahaman
Particle Swarm Optimization Based Reversible Circuit Synthesis Using Mixed Control Toffoli Gates. J. Low Power Electron. 9 (3) (2013)
Kamalika Datta, Gaurav Rathi, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
Exploiting Negative Control Lines in the Optimization of Reversible Circuits. RC (2013)
Kanchan Manna, Shailesh Singh, Santanu Chattopadhyay, Indranil Sengupta
Preemptive Test Scheduling for Network-on-Chip Using Particle Swarm Optimization. VDAT (2013)
Bibhas Ghoshal, Indranil Sengupta
A Distributed BIST Scheme for NoC-Based Memory Cores. DSD (2013)
Kamalika Datta, Vishal Shrivastav, Indranil Sengupta, Hafizur Rahaman
Reversible logic implementation of AES algorithm. DTIS (2013)
Ayantika Chatterjee, Manish Kaushal, Indranil Sengupta
Accelerating Sorting of Fully Homomorphic Encrypted Data. INDOCRYPT (2013)
Bodhisatwa Mazumdar, Debdeep Mukhopadhyay, Indranil Sengupta
Design and implementation of rotation symmetric S-boxes with high nonlinearity and high DPA resilience. HOST (2013)
Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
An ATE assisted DFD technique for volume diagnosis of scan chains. DAC (2013)
Atanu Basu, Indranil Sengupta, Jamuna Kanta Sing
Cryptosystem for Secret Sharing Scheme with Hierarchical Groups. Int. J. Netw. Secur. 15 (6) (2013)
Kamalika Datta, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
An evolutionary approach to reversible logic synthesis using output permutation. IDT (2013)
Ayantika Chatterjee, Indranil Sengupta
Design of a high performance Binary Edwards Curve based processor secured against side channel analysis. Integr. 45 (3) (2012)
Bodhisatwa Mazumdar, Debdeep Mukhopadhyay, Indranil Sengupta
Design for Security of Block Cipher S-Boxes to Resist Differential Power Attacks. VLSI Design (2012)
Bodhisatwa Mazumdar, Debdeep Mukhopadhyay, Indranil Sengupta
Constrained Search for a Class of Good S-Boxes with Improved DPA Resistivity. IACR Cryptol. ePrint Arch. 2012 (2012)
Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
A Diagnosability Metric for Test Set Selection Targeting Better Fault Detection. VLSI Design (2012)
Atanu Basu, Indranil Sengupta, Jamuna Kanta Sing
Secured hierarchical secret sharing using ECC based signcryption. Secur. Commun. Networks 5 (7) (2012)
Rekha Govindaraj, Indranil Sengupta, Santanu Chattopadhyay
An Efficient Technique for Longest Prefix Matching in Network Routers. VDAT (2012)
Bibhas Ghoshal, Subhadip Kundu, Indranil Sengupta, Santanu Chattopadhyay
Particle Swarm Optimization Based BIST Design for Memory Cores in Mesh Based Network-on-Chip. VDAT (2012)
Ayantika Chatterjee, Indranil Sengupta
FPGA implementation of extended reconfigurable Binary Edwards Curve based processor. ICNC (2012)
Kanchan Manna, Santanu Chattopadhaya, Indranil Sengupta
An efficient routing technique for mesh-of-tree-based NoC and its performance comparison. Int. J. High Perform. Syst. Archit. 4 (1) (2012)

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Publication Activity (10 Years)

Top Topics

Top Venues

Indranil Sengupta