Indrajit Chakrabarti

Publication Activity (10 Years)

Years Active: 2008-2024
Publications (10 Years): 69

Top Topics

Vlsi Architecture

Motion Estimation

Top Venues

Microprocess. Microsystems

Circuits Syst. Signal Process.

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Ashish Ranjan Shadangi, Suvra Sekhar Das, Indrajit Chakrabarti
Low-Complexity VLSI Architecture for OTFS Transceiver Under Multipath Fading Channel. IEEE Trans. Very Large Scale Integr. Syst. 32 (7) (2024)
Ashish Ranjan Shadangi, Suvra Sekhar Das, Indrajit Chakrabarti
VLSI Architecture for Implementing OTFS. Wirel. Pers. Commun. 137 (3) (2024)
Sivappriya Manivannan, Rajat Subhra Chakraborty, Indrajit Chakrabarti, Jothi Rangasamy
Practical and Efficient PUF-Based Protocol for Authentication and Key Agreement in IoT. IEEE Embed. Syst. Lett. 16 (2) (2024)
Venkata Sreekanth Balijabudda, Kamalesh Acharya, Rajat Subhra Chakraborty, Indrajit Chakrabarti
Theoretical Enumeration of Deployable Single-Output Strong PUF Instances Based on Uniformity and Uniqueness Constraints. ICISS (2023)
Radhika V. Menon, Indrajit Chakrabarti
Low complexity VLSI architecture for improved primal-dual support vector machine learning core. Microprocess. Microsystems 98 (2023)
Anand Kumar Mukhopadhyay, Sampurna Majumder, Indrajit Chakrabarti
Systematic realization of a fully connected deep and convolutional neural network architecture on a field programmable gate array. Comput. Electr. Eng. 97 (2022)
Ashish Singhadia, Preeti Samhita Pati, Chetna Singhal, Indrajit Chakrabarti
Efficient HEVC Encoding to Meet Bitrate and PSNR Requirements Using Parametric Modeling. Circuits Syst. Signal Process. 41 (8) (2022)
Suman Samui, Indrajit Chakrabarti, Soumya K. Ghosh
Auditory Model based Phase-Aware Bayesian Spectral Amplitude Estimator for Single-Channel Speech Enhancement. CoRR (2022)
Anand Kumar Mukhopadhyay, Naligala Moses Prabhakar, Divya Lakshmi Duggisetty, Indrajit Chakrabarti, Mrigank Sharad
Acoustic scene analysis using analog spiking neural network. Neuromorph. Comput. Eng. 2 (4) (2022)
Anand Kumar Mukhopadhyay, Atul Sharma, Indrajit Chakrabarti, Arindam Basu, Mrigank Sharad
Power-efficient Spike Sorting Scheme Using Analog Spiking Neural Network Classifier. ACM J. Emerg. Technol. Comput. Syst. 17 (2) (2021)
Prasad Nagabhushanamgari, Vikash Sehwag, Indrajit Chakrabarti, Santanu Chattopadhyay
Embedding delay-based physical unclonable functions in networks-on-chip. IET Circuits Devices Syst. 15 (1) (2021)
Sudipta Bose, Arijit De, Indrajit Chakrabarti
Area-Delay-Power Efficient VLSI Architecture of FIR Filter for Processing Seismic Signal. IEEE Trans. Circuits Syst. II Express Briefs 68 (11) (2021)
Radhika V. Menon, Shantharam Kalipatnapu, Indrajit Chakrabarti
High speed VLSI architecture for improved region based active contour segmentation technique. Integr. 77 (2021)
Ashish Singhadia, Md. Minhazuddin, Meghan Mamillapalli, Indrajit Chakrabarti
A fast integrated deblocking filter and sample-adaptive-offset parameter estimation architecture for HEVC. Microprocess. Microsystems 85 (2021)
Rohan Mukherjee, Indubu Gaana Vinod, Indrajit Chakrabarti, Pranab Kumar Dutta, Ajoy Kumar Ray
Hexagon Based Compressed Diamond Algorithm for motion estimation and its dedicated VLSI system for HD videos. Expert Syst. Appl. 141 (2020)
Shantharam Kalipatnapu, Indrajit Chakrabarti
Low-Complexity Interval Passing Algorithm and VLSI Architecture for Binary Compressed Sensing. IEEE Trans. Very Large Scale Integr. Syst. 28 (5) (2020)
Kota Naga Srinivasarao Batta, Indrajit Chakrabarti
VLSI Architecture for Enhanced Approximate Message Passing Algorithm. IEEE Trans. Circuits Syst. Video Technol. 30 (9) (2020)
Ashish Singhadia, Meghan Mamillapalli, Indrajit Chakrabarti
Hardware-Efficient 2D-DCT/IDCT Architecture for Portable HEVC-Compliant Devices. IEEE Trans. Consumer Electron. 66 (3) (2020)
Sudipta Bose, Arijit De, Indrajit Chakrabarti
Framework for Automated Earthquake Event Detection Based on Denoising by Adaptive Filter. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2020)
Ashish Singhadia, Pratik Bante, Indrajit Chakrabarti
A Novel Algorithmic Approach for Efficient Realization of 2-D-DCT Architecture for HEVC. IEEE Trans. Consumer Electron. 65 (3) (2019)
N. Prasad, Navonil Chatterjee, Santanu Chattopadhyay, Indrajit Chakrabarti
Runtime Mitigation of Packet Drop Attacks in Fault-tolerant Networks-on-Chip. CoRR (2019)
Bibhas Manna, Snehanjan Acharyya, Indrajit Chakrabarti, Prasanta Kumar Guha
Exploring Formaldehyde Sensing Capability of Noble Metal Decorated Reduced Graphene Oxide through First Principle Approach. IEEE SENSORS (2019)
Suman Samui, Indrajit Chakrabarti, Soumya K. Ghosh
Time-frequency masking based supervised speech enhancement framework using fuzzy deep belief network. Appl. Soft Comput. 74 (2019)
Anand Kumar Mukhopadhyay, Naligala Moses Prabhakar, Divya Lakshmi Duggisetty, Indrajit Chakrabarti, Mrigank Sharad
Intelligent Wireless Sensor Nodes for Human Footstep Sound Classification for Security Application. CoRR (2019)
Shantharam Kalipatnapu, Indrajit Chakrabarti
High-throughput Bit Flipping decoder for structured LDPC codes. IET Commun. 13 (14) (2019)
Yaswanth Krishna Yadav Danaboina, Pravanjan Samanta, Kamalika Datta, Indrajit Chakrabarti, Indranil Sengupta
Design and Implementation of Threshold Logic Functions Using Memristors. VLSI Design (2019)
Venkata Sreekanth Balijabudda, Dhruv Thapar, Pranesh Santikellur, Rajat Subhra Chakraborty, Indrajit Chakrabarti
Design of a Chaotic Oscillator based Model Building Attack Resistant Arbiter PUF. AsianHOST (2019)
Suman Samui, Indrajit Chakrabarti, Soumya K. Ghosh
Tensor-Train Long Short-Term Memory for Monaural Speech Enhancement. CoRR (2018)
N. Prasad, Indrajit Chakrabarti, Santanu Chattopadhyay
An Energy-Efficient Network-on-Chip-Based Reconfigurable Viterbi Decoder Architecture. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2018)
Rohan Mukherjee, Priyabrata Saha, Indrajit Chakrabarti, Pranab Kumar Dutta, Ajoy Kumar Ray
Fast adaptive motion estimation algorithm and its efficient VLSI system for high definition videos. Expert Syst. Appl. 101 (2018)
Shiju Padmanabhan Puthenpurayil, Indrajit Chakrabarti, Rishi Virdi, Snehal Wasnik
VLSI architecture for fixed mesh based deformable motion estimation using ARPS algorithm. Microprocess. Microsystems 59 (2018)
N. Prasad, Priyajit Mukherjee, Santanu Chattopadhyay, Indrajit Chakrabarti
Design and evaluation of ZMesh topology for on-chip interconnection networks. J. Parallel Distributed Comput. 113 (2018)
Anand Kumar Mukhopadhyay, Indrajit Chakrabarti, Arindam Basu, Mrigank Sharad
Power efficient Spiking Neural Network Classifier based on memristive crossbar network for spike sorting application. CoRR (2018)
Indranil Hatai, Indrajit Chakrabarti, Swapna Banerjee
A Computationally Efficient Reconfigurable Constant Multiplication Architecture Based on CSD Decoded Vertical-Horizontal Common Sub-Expression Elimination Algorithm. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2018)
Anand Kumar Mukhopadhyay, Indrajit Chakrabarti, Mrigank Sharad
Classification of Hand Movements by Surface Myoelectric Signal Using Artificial-Spiking Neural Network Model. IEEE SENSORS (2018)
Vikash Sehwag, N. Prasad, Indrajit Chakrabarti
A Parallel Stochastic Number Generator With Bit Permutation Networks. IEEE Trans. Circuits Syst. II Express Briefs (2) (2018)
Baishik Biswas, Rohan Mukherjee, Indrajit Chakrabarti, Pranab Kumar Dutta, Ajoy Kumar Ray
A High-Speed VLSI Architecture for Motion Estimation Using Modified Adaptive Rood Pattern Search Algorithm. Circuits Syst. Signal Process. 37 (10) (2018)
Rohan Mukherjee, Anupam Banerjee, Indrajit Chakrabarti, Pranab Kumar Dutta, Ajoy Kumar Ray
Efficient VLSI design of CAVLC decoder of H.264 for HD videos. ISED (2017)
Suman Samui, Indrajit Chakrabarti, Soumya K. Ghosh
Improving the Performance of Deep Learning Based Speech Enhancement System Using Fuzzy Restricted Boltzmann Machine. PReMI (2017)
Anand Kumar Mukhopadhyay, Indrajit Chakrabarti, Mrigank Sharad
Real-time digitized neural-spike storage scheme in multiple channels for biomedical applications. APSIPA (2017)
Debasish Bera, Indrajit Chakrabarti, Sant S. Pathak, George K. Karagiannidis
Another Look in the Analysis of Cooperative Spectrum Sensing over Nakagami-m Fading Channels. IEEE Trans. Wirel. Commun. 16 (2) (2017)
Mamata Panigrahy, Nirmal Chandra Behera, B. Vandana, Indrajit Chakrabarti, Anindya Sundar Dhar
Memory Efficient Fractal-SPIHT Based Hybrid Image Encoder. VDAT (2017)
Rohan Mukherjee, Baishik Biswas, Indrajit Chakrabarti, Pranab Kumar Dutta, Somnath Sengupta, Ajoy Kumar Ray
Speed-Area Optimized VLSI Architecture of Hexagonal Search Algorithm for Motion Estimation of (512×512) Frames. Circuits Syst. Signal Process. 36 (2) (2017)
Suman Samui, Pragya Sahu, Indrajit Chakrabarti, Soumya Kanti Ghosh
FPGA Implementation of a Phase-Aware Single-Channel Speech Enhancement System. Circuits Syst. Signal Process. 36 (11) (2017)
Suman Samui, Indrajit Chakrabarti, Soumya K. Ghosh
Deep Recurrent Neural Network Based Monaural Speech Separation Using Recurrent Temporal Restricted Boltzmann Machines. INTERSPEECH (2017)
Kota Naga Srinivasarao Batta, Vinay Chakravarthi Gogineni, Subrahmanyam Mula, Indrajit Chakrabarti
A novel framework for compressed sensing based scalable video coding. Signal Process. Image Commun. 57 (2017)
N. Prasad, Rajit Karmakar, Santanu Chattopadhyay, Indrajit Chakrabarti
Runtime mitigation of illegal packet request attacks in Networks-on-Chip. ISCAS (2017)
Rohan Mukherjee, Baishik Biswas, Indrajit Chakrabarti, Pranab Kumar Dutta, Ajoy Kumar Ray
Efficient VLSI design of adaptive rood pattern search algorithm for motion estimation of high definition videos. Microprocess. Microsystems 45 (2016)
Suman Samui, Indrajit Chakrabarti, Soumya Kanti Ghosh
Two-Stage Temporal Processing for Single-Channel Speech Enhancement. INTERSPEECH (2016)
Rohan Mukherjee, Vikrant Mahajan, Anindya Sundar Dhar, Indrajit Chakrabarti
High Performance VISI Design of Diamond Search Algorithm for Fast Motion Estimation. J. Circuits Syst. Comput. 25 (9) (2016)
Mamata Panigrahy, Indrajit Chakrabarti, Anindya Sundar Dhar
Low-Delay Parallel Architecture for Fractal Image Compression. Circuits Syst. Signal Process. 35 (3) (2016)
Kota Naga Srinivasarao Batta, Vinay Chakravarthi Gogineni, Subrahmanyam Mula, Indrajit Chakrabarti
VLSI Friendly Framework for Scalable Video Coding based on Compressed Sensing. CoRR (2016)
Sandip Das, Suvra Sekhar Das, Indrajit Chakrabarti
Hardware implementation of MIL-STD-1553 protocol over OFDMA-PHY based wireless high data rate avionics systems. ANTS (2016)
Shiju Padmanabhan Puthenpurayil, Indrajit Chakrabarti, Rishi Virdi, Harsh Kaushik
Very large scale integration architecture for block-matching motion estimation using adaptive rood pattern search algorithm. IET Circuits Devices Syst. 10 (4) (2016)
Suman Samui, Indrajit Chakrabarti, Soumya Kanti Ghosh
Improved single channel phase-aware speech enhancement technique for low signal-to-noise ratio signal. IET Signal Process. 10 (6) (2016)
Debasish Bera, Indrajit Chakrabarti, Sant Sharan Pathak
Modelling of Cooperative Spectrum Sensing over Rayleigh Fading Without CSI in Cognitive Radio Networks. Wirel. Pers. Commun. 86 (3) (2016)
Indranil Hatai, Indrajit Chakrabarti, Swapna Banerjee
An Efficient VLSI Architecture of a Reconfigurable Pulse-Shaping FIR Interpolation. IEEE Trans. Very Large Scale Integr. Syst. 23 (6) (2015)
Suman Samui, Indrajit Chakrabarti, Soumya Kanti Ghosh
A phase-aware single channel speech enhancement technique using separate bayesian estimators for voiced and unvoiced regions with digital hearing aid application. HealthCom (2015)
Radhika V. Menon, Poulami Raha, Shweta Kothari, Sumit Chakraborty, Indrajit Chakrabarti, Rezaul Karim
Automated detection and classification of mass from breast ultrasound images. NCVPRIPG (2015)
Kota Naga Srinivasarao Batta, Indrajit Chakrabarti
High Speed VLSI Architecture for 3-D Discrete Wavelet Transform. CoRR (2015)
N. Prasad, Santanu Chattopadhyay, Indrajit Chakrabarti
ZMesh: An Energy-Efficient Network-on-Chip Topology for Constant-Geometry Algorithms. iNIS (2015)
Subhomoy Bhattacharyya, Indrajit Chakrabarti, Maheshkumar H. Kolekar
Complexity assisted consistent quality rate control for high resolution H.264 video conferencing. NCVPRIPG (2015)
Baishik Biswas, Rohan Mukherjee, Indrajit Chakrabarti
Efficient architecture of adaptive rood pattern search technique for fast motion estimation. Microprocess. Microsystems 39 (3) (2015)
Indranil Hatai, Indrajit Chakrabarti, Swapna Banerjee
An Efficient Constant Multiplier Architecture Based on Vertical-Horizontal Binary Common Sub-expression Elimination Algorithm for Reconfigurable FIR Filter Synthesis. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2015)
Kota Naga Srinivasarao Batta, Indrajit Chakrabarti
Hardware Implementation of Compressed Sensing based Low Complex Video Encoder. CoRR (2015)
Kota Naga Srinivasarao Batta, Indrajit Chakrabarti, Mohammad Nawaz Ahmad
High-speed low-power very-large-scale integration architecture for dual-standard deblocking filter. IET Circuits Devices Syst. 9 (5) (2015)
Rohan Mukherjee, Keyur Sheth, Anindya Sundar Dhar, Indrajit Chakrabarti, Somnath Sengupta
High Performance VLSI Architecture for Three-Step Search Algorithm. Circuits Syst. Signal Process. 34 (5) (2015)
N. Prasad, Santanu Chattopadhyay, Indrajit Chakrabarti
Reconfigurable data parallel constant geometry fast Fourier transform architectures on Network-on-Chip. Microprocess. Microsystems 39 (8) (2015)
Sandip Das, Indrajit Chakrabarti, Suvra Sekhar Das
Hardware implementation of Frequency Domain Link Adaptation for OFDMA based systems. NCC (2015)
Debasish Bera, Shobhit Maheshwari, Indrajit Chakrabarti, Sant Saran Pathak
Decentralized cooperative spectrum sensing in cognitive radio without fusion centre. NCC (2014)
Mamata Panigrahy, Indrajit Chakrabarti, Anindya Sundar Dhar
VLSI design of fast fractal image encoder. VDAT (2014)
R. Mukherjee, Vikrant Mahajan, Indrajit Chakrabarti, S. Sengupta
High performance VLSI implementation of Context-based Adaptive Variable Length Coding (CAVLC) for H.264 encoder. NCVPRIPG (2013)
Indranil Hatai, Indrajit Chakrabarti, Swapna Banerjee
Reconfigurable Architecture of a RRC Fir Interpolator for Multi-standard Digital Up Converter. IPDPS Workshops (2013)
Sumit Kumar Chatterjee, Indrajit Chakrabarti
Algorithm and architecture for quarter pixel motion estimation for H.264/AVC. NCVPRIPG (2013)
Shaikh Montajul Karim, Indrajit Chakrabarti
High-throughput turbo decoder using pipelined parallel architecture and collision-free interleaver. IET Commun. 6 (11) (2012)
Sumit Kumar Chatterjee, Indrajit Chakrabarti
Power efficient motion estimation algorithm and architecture based on pixel truncation. IEEE Trans. Consumer Electron. 57 (4) (2011)
Indranil Hatai, Indrajit Chakrabarti
A New High-Performance Digital FM Modulator and Demodulator for Software-Defined Radio and Its FPGA Implementation. Int. J. Reconfigurable Comput. 2011 (2011)
Jaydeb Bhaumik, Dipanwita Roy Chowdhury, Indrajit Chakrabarti
Null Boundary 90/150 Cellular Automata for Multi-byte Error Correcting Code. ACRI (2010)
Indranil Hatai, Indrajit Chakrabarti
Multi-standard programmable baseband modulator for next generation wireless communication CoRR (2010)
Sumit Kumar Chatterjee, Indrajit Chakrabarti
Low power VLSI architectures for one bit transformation based fast motion estimation. IEEE Trans. Consumer Electron. 56 (4) (2010)
Shaikh Montajul Karim, Indrajit Chakrabarti
An improved low-power high-throughput log-MAP turbo decoder. IEEE Trans. Consumer Electron. 56 (2) (2010)
Kalyan Goswami, Indrajit Chakrabarti, Shamik Sural
A probabilistic adaptive algorithm for constructing hierarchical meshes. IEEE Trans. Consumer Electron. 55 (3) (2009)
Jaydeb Bhaumik, Dipanwita Roy Chowdhury, Indrajit Chakrabarti
An Improved Double Byte Error Correcting Code Using Cellular Automata. ACRI (2008)
Kota Naga Srinivasarao Batta, Indrajit Chakrabarti
A Parallel Architecture for Successive Elimination Block Matching Algorithm. ICVGIP (2008)
Tenugu Suman, Sumit Kumar Chatterjee, Indrajit Chakrabarti
High Speed and Memory Efficient Parallel Bit Plane Coding Architecture for JPEG2000. ICVGIP (2008)