Login / Signup
Design and evaluation of ZMesh topology for on-chip interconnection networks.
N. Prasad
Priyajit Mukherjee
Santanu Chattopadhyay
Indrajit Chakrabarti
Published in:
J. Parallel Distributed Comput. (2018)
Keyphrases
</>
interconnection networks
multistage
dynamic programming
high speed
image processing
data processing
load balancing
parallel algorithm