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Area-Delay-Power Efficient VLSI Architecture of FIR Filter for Processing Seismic Signal.
Sudipta Bose
Arijit De
Indrajit Chakrabarti
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2021)
Keyphrases
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vlsi implementation
vlsi architecture
fir filters
signal processing
real time
impulse response
frequency response
frequency domain
high frequency
filter bank
low complexity
filter design
computer vision
computationally efficient
spatial domain
low power