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TSV Placement and Core Mapping for 3D Mesh Based Network-on-Chip Design Using Extended Kernighan-Lin Partitioning.
Kanchan Manna
Vadapalli Shanmukha Sri Teja
Santanu Chattopadhyay
Indranil Sengupta
Published in:
ISVLSI (2015)
Keyphrases
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design process
real time
design methodology