Int. J. High Perform. Syst. Archit.

Keyphrases

Publications

volume 11, number 3, 2023

S. K. Binu Siva Singh, K. V. Karthikeyan
High resolution digital pulse width modulator architecture using reversible synchronous sequential counter and synchronous phase-shifted circuit. Int. J. High Perform. Syst. Archit. 11 (3) (2023)
K. Janani, S. Ramamoorthy
Countermeasure SDN-based IoT threats using blockchain multicontroller. Int. J. High Perform. Syst. Archit. 11 (3) (2023)
Shweta Kumari, Zeesha Mishra, Bibhudendra Acharya
Efficient hardware implementation of SIMECK lightweight block cipher. Int. J. High Perform. Syst. Archit. 11 (3) (2023)
Prashant S. Titare, D. G. Khairnar
MPSoC design and implementation using microblaze soft core processor architecture for faster execution of arithmetic application. Int. J. High Perform. Syst. Archit. 11 (3) (2023)
Fadi N. Sibai, Abu Asaduzzaman, Ali El-Moursy
3D layout of the Spidergon-Donut on-chip interconnection network. Int. J. High Perform. Syst. Archit. 11 (3) (2023)
Apeksha Kamble, Zeesha Mishra, Bibhudendra Acharya
Hardware implementations of LBlock and XXTEA lightweight block ciphers for resource-constrained IoT application. Int. J. High Perform. Syst. Archit. 11 (3) (2023)

volume 11, number 1, 2022

volume 11, number 2, 2022

volume 10, number 1, 2021

volume 10, number 2, 2021

volume 10, number 3/4, 2021

volume 9, number 2/3, 2020

volume 9, number 4, 2020