3D layout of the Spidergon-Donut on-chip interconnection network.

Fadi N. Sibai Abu Asaduzzaman Ali El-Moursy

Published in: Int. J. High Perform. Syst. Archit. (2023)

Keyphrases

interconnection networks
fault tolerant
parallel algorithm
multistage
routing algorithm
high speed
low cost
message passing
parallel computers
bayesian networks
data streams
depth map