Abhoy Kole

Publication Activity (10 Years)

Years Active: 2015-2024
Publications (10 Years): 21

Top Topics

Nearest Neighbor

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Abhoy Kole, Arighna Deb, Kamalika Datta, Rolf Drechsler
Dynamic Realization of Multiple Control Toffoli Gate. DATE (2024)
Khushboo Qayyum, Abhoy Kole, Kamalika Datta, Muhammad Hassan, Rolf Drechsler
Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification. ACM Great Lakes Symposium on VLSI (2024)
Liam Hurwitz, Kamalika Datta, Abhoy Kole, Rolf Drechsler
Is Simulation the only Alternative for Effective Verification of Dynamic Quantum Circuits? RC (2024)
Lennart Weingarten, Kamalika Datta, Abhoy Kole, Rolf Drechsler
Complete and Efficient Verification for a RISC-V Processor Using Formal Verification. DATE (2024)
Fatemeh Shirinzadeh, Arighna Deb, Saeideh Shirinzadeh, Abhoy Kole, Kamalika Datta, Rolf Drechsler
In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures. VLSID (2024)
Abhoy Kole, Kamalika Datta, Philipp Niemann, Indranil Sengupta, Rolf Drechsler
Exploiting the Benefits of Clean Ancilla Based Toffoli Gate Decomposition Across Architectures. RC (2023)
Kamalika Datta, Arighna Deb, Fatemeh Shirinzadeh, Abhoy Kole, Saeideh Shirinzadeh, Rolf Drechsler
Verification of In-Memory Logic Design using ReRAM Crossbars. NEWCAS (2023)
Abhoy Kole, Arighna Deb, Kamalika Datta, Rolf Drechsler
Extending the Design Space of Dynamic Quantum Circuits for Toffoli based Network. DATE (2023)
Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler
Improved Cost-Metric for Nearest Neighbor Mapping of Quantum Circuits to 2-Dimensional Hexagonal Architecture. RC (2023)
Kamalika Datta, Arighna Deb, Abhoy Kole, Rolf Drechsler
Impact of sneak paths on in-memory logic design in memristive crossbars. it Inf. Technol. 65 (1-2) (2023)
Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler
Nearest Neighbor Mapping of Quantum Circuits to Two-Dimensional Hexagonal Qubit Architecture. ISMVL (2022)
Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler
Mapping Quantum Circuits to 2-Dimensional Quantum Architectures. GI-Jahrestagung (2022)
Abhoy Kole, Kamalika Datta, Indranil Sengupta, Rolf Drechsler
SAT-based Exact Synthesis of Ternary Reversible Circuits using a Functionally Complete Gate Library. DSD (2022)
Abhoy Kole, Stefan Hillmich, Kamalika Datta, Robert Wille, Indranil Sengupta
Improved Mapping of Quantum Circuits to IBM QX Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (10) (2020)
Abhoy Kole, Kamalika Datta, Indranil Sengupta
A New Heuristic for N-Dimensional Nearest Neighbor Realization of a Quantum Circuit. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (1) (2018)
Abhoy Kole, Kamalika Datta
Improved NCV Gate Realization of Arbitrary Size Toffoli Gates. VLSI Design (2017)
Abhoy Kole, P. Mercy Nesa Rani, Kamalika Datta, Indranil Sengupta, Rolf Drechsler
Exact Synthesis of Ternary Reversible Functions Using Ternary Toffoli Gates. ISMVL (2017)
Abhoy Kole, Robert Wille, Kamalika Datta, Indranil Sengupta
Test Pattern Generation Effort Evaluation of Reversible Circuits. RC (2017)
P. Mercy Nesa Rani, Abhoy Kole, Kamalika Datta, Indranil Sengupta
Improved Decomposition of Multiple-Control Ternary Toffoli Gates Using Muthukrishnan-Stroud Quantum Gates. RC (2017)
Leniency Marbaniang, Abhoy Kole, Kamalika Datta, Indranil Sengupta
Design of Efficient Quantum Circuits Using Nearest Neighbor Constraint in 2D Architecture. RC (2017)
Abhoy Kole, Kamalika Datta, Indranil Sengupta
A Heuristic for Linear Nearest Neighbor Realization of Quantum Circuits by SWAP Gate Insertion Using N-Gate Lookahead. IEEE J. Emerg. Sel. Topics Circuits Syst. 6 (1) (2016)
Abhoy Kole, Kamalika Datta, Indranil Sengupta, Robert Wille
Towards a Cost Metric for Nearest Neighbor Constraints in Reversible Circuits. RC (2015)