Sajjad Parvin

Publication Activity (10 Years)

Years Active: 2018-2024
Publications (10 Years): 13

Top Topics

Fault Detection

Tennessee Eastman

Top Venues

Publications

Sajjad Parvin, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
Hidden Cost of Circuit Design with RFETs. DATE (2024)
Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler
FELOPi: A Framework for Simulation and Evaluation of Post-Layout File Against Optical Probing. DATE (2023)
Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler
Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans - A RISC-V Case Study. ASP-DAC (2023)
Sajjad Parvin, Mehran Goli, Thilo Krachenfels, Shahin Tajik, Jean-Pierre Seifert, Frank Sill Torres, Rolf Drechsler
LAT-UP: Exposing Layout-Level Analog Hardware Trojans Using Contactless Optical Probing. ISVLSI (2023)
Sajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
Lo-RISK: Design of a Low Optical Leakage and High Performance RISC-V Core. COINS (2023)
Sajjad Parvin, Thilo Krachenfels, Shahin Tajik, Jean-Pierre Seifert, Frank Sill Torres, Rolf Drechsler
Toward Optical Probing Resistant Circuits: A Comparison of Logic Styles and Circuit Design Techniques. ASP-DAC (2022)
Mohammadreza Esmali Nojehdeh, Sajjad Parvin, Mustafa Altun
Efficient Hardware Realizations of Feedforward Artificial Neural Networks. CoRR (2021)
Sajjad Parvin, Mustafa Altun
A Study on Hardware-Aware Training Techniques for Feedforward Artificial Neural Networks. ISVLSI (2021)
Mohammadreza Esmali Nojehdeh, Sajjad Parvin, Mustafa Altun
Efficient Hardware Implementation of Convolution Layers Using Multiply-Accumulate Blocks. ISVLSI (2021)
Levent Aksoy, Sajjad Parvin, Mohammadreza Esmali Nojehdeh, Mustafa Altun
Efficient Time-Multiplexed Realization of Feedforward Artificial Neural Networks. ISCAS (2020)
Sajjad Parvin, Mustafa Altun
Perfect Concurrent Fault Detection in CMOS Logic Circuits Using Parity Preservative Reversible Gates. IEEE Access 7 (2019)
Sajjad Parvin, Mustafa Altun
Implementation of CMOS Logic Circuits with Perfect Fault Detection Using Preservative Reversible Gates. IOLTS (2019)
Mustafa Altun, Sajjad Parvin, M. Hüsrev Cilasun
Exploiting Reversible Computing for Latent-Fault-Free Error Detecting/Correcting CMOS Circuits. IEEE Access 6 (2018)