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Efficient Hardware Implementation of Convolution Layers Using Multiply-Accumulate Blocks.
Mohammadreza Esmali Nojehdeh
Sajjad Parvin
Mustafa Altun
Published in:
ISVLSI (2021)
Keyphrases
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hardware implementation
efficient implementation
signal processing
fpga implementation
hardware architecture
software implementation
dedicated hardware
hardware design
fpga technology
neural network
face recognition
field programmable gate array
fpga device