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RSP
1990
2000
2010
2023
1990
2023
Keyphrases
Publications
2023
Felipe G. Magalhaes
,
Mahdi Nikdast
,
Gabriela Nicolescu
SerIOS: Enhancing Hardware Security in Integrated Optoelectronic Systems.
RSP
(2023)
Raphaële Milan
,
Loïc Lagadec
,
Théotime Bollengier
,
Lilian Bossuet
,
Ciprian Teodorov
Secured-by-design systems-on-chip: a MBSE Approach.
RSP
(2023)
Colin Stephenne
,
Felipe Gohring de Magalhaes
,
Frédéric Cuppens
,
Jean-Yves Ouattara
,
Militza Jean
,
Jose Fernandez
,
Gabriela Nicolescu
Security assessment of a commercial router using physical access: a case study.
RSP
(2023)
Fearghal Morgan
,
John Patrick Byrne
,
Abishek Bupathi
,
Roshan George
,
Muhammad Adnan Elahi
,
Frank Callaly
,
Sean Kelly
,
Declan O'Loughlin
HDLGen-ChatGPT Case Study: RISC-V Processor VHDL and Verilog Model - Testbench and EDA Project Generation.
RSP
(2023)
Navid Jafarof
,
Kenneth B. Kent
The Impact of Heterogeneous Logic on Adders and Multipliers in VTR.
RSP
(2023)
Melih Peker
,
Ozcan Ozturk
Fast Compiler Optimization Flag Selection.
RSP
(2023)
Choonghoon Park
,
Hyunsu Moh
,
Jimin Lee
,
Changjae Yi
,
Soonhoi Ha
Fast and Accurate Virtual Prototyping of an NPU with Analytical Memory Modeling.
RSP
(2023)
Alireza Azadi
,
Amir Arjomand
,
Kenneth B. Kent
Extending Memory Compatibility with Yosys Front-End in VTR Flow.
RSP
(2023)
Henrique Amaral Misson
,
Rim Zrelli
,
Maroua Ben Attia
,
Felipe Gohring de Magalhaes
,
Gabriela Nicolescu
ReDaML: A Modeling Language for DO-178C High-Level Requirements in Airspace Systems.
RSP
(2023)
Mohamed Nadeem
,
Jan Kleinekathöfer
,
Rolf Drechsler
Polynomial Formal Verification exploiting Constant Cutwidth.
RSP
(2023)
Tobias Strauch
MRPHS: A Verilog RTL to C++ Model Compiler Using Intermediate Representations for Object-oriented Model-driven Prototyping.
RSP
(2023)
Proceedings of the 34th International Workshop on Rapid System Prototyping, RSP 2023, Hamburg, Germany, 21 September 2023
RSP
(2023)
2022
Dominique Heller
,
Mostafa Rizk
,
R. Douguet
,
Amer Baghdadi
,
Jean-Philippe Diguet
Marine Objects Detection Using Deep Learning on Embedded Edge Devices.
RSP
(2022)
Arthur Vianès
,
Frédéric Pétrot
,
Frédéric Rousseau
A Case for Second-Level Software Cache Coherency on Many-Core Accelerators.
RSP
(2022)
IEEE International Workshop on Rapid System Prototyping, RSP 2022, Shanghai, China, October 13, 2022
RSP
(2022)
Seungyeop Kang
,
Sungjoo Yoo
TernaryNeRF: Quantizing Voxel Grid-based NeRF Models.
RSP
(2022)
Martim Rosado
,
Stavros Mallios
,
Pedro Tomás
,
Nuno Roma
,
André David
Early prototyping and testing of CERN LHC CMS high-granularity calorimeter slow-control system.
RSP
(2022)
Ritwik Sinha
,
Seyed Alireza Damghani
,
Kenneth B. Kent
Machine Learning-Based Hard/Soft Logic Trade-offs in VTR.
RSP
(2022)
Jakob Wenzel
,
Christian Hochberger
Automatically Restructuring HDL Modules for Improved Reusability in Rapid Synthesis.
RSP
(2022)
Gabriel Rutsch
,
Maximilian Groebner
,
Anthony Sanders
,
Konrad Maier
,
Wolfgang Ecker
A framework that enables systematic analysis of mixed-signal applications on FPGA.
RSP
(2022)
Z. Ning
,
Mostafa Rizk
,
Amer Baghdadi
,
Jean-Philippe Diguet
Enhancing embedded AI-based object detection using multi-view approach.
RSP
(2022)
Weiyan Zhang
,
Mehran Goli
,
Alireza Mahzoon
,
Rolf Drechsler
ANN-based Performance Estimation of Embedded Software for RISC-V Processors.
RSP
(2022)
2021
Loïc France
,
Florent Bruguier
,
Maria Mushtaq
,
David Novo
,
Pascal Benoit
Implementing Rowhammer Memory Corruption in the gem5 Simulator.
RSP
(2021)
Nils Büscher
,
Daniel Gis
,
Johann-Peter Wolff
,
Christian Haubelt
Data Augmentation Framework for Smart Sensor System Development Using the Sensor-in-the-Loop Prototyping Platform.
RSP
(2021)
Kevin Mambu
,
Henri-Pierre Charles
,
Julie Dumas
,
Maha Kooli
Instruction Set Design Methodology for In-Memory Computing through QEMU-based System Emulator.
RSP
(2021)
Theo Soriano
,
David Novo
,
Pascal Benoit
An FPGA-based Emulation Platform for Edge Computing Node Design Exploration.
RSP
(2021)
Bruno Ferres
,
Olivier Muller
,
Frédéric Rousseau
Integrating Quick Resource Estimators in Hardware Construction Framework for Design Space Exploration.
RSP
(2021)
Théotime Bollengier
,
Loïc Lagadec
,
Ciprian Teodorov
Prototyping FPGA through overlays.
RSP
(2021)
IEEE International Workshop on Rapid System Prototyping, RSP 2021, Paris, France, October 14, 2021
RSP
(2021)
Felipe Göhring de Magalhães
,
Mahdi Nikdast
,
Fabiano Hessel
,
Odile Liboiron-Ladouceur
,
Gabriela Nicolescu
HyCo: A Low-Latency Hybrid Control Plane for Optical Interconnection Networks.
RSP
(2021)
Harpreet Kaur
,
Georgiy Krylov
,
Seyed Alireza Damghani
,
Kenneth B. Kent
Heterogeneous Logic Implementation for Adders in VTR.
RSP
(2021)
Kevin Neubauer
,
Leonard Masing
,
Michael Mahl
,
Jürgen Becker
,
Max E. Kramer
,
Clemens Reichmann
Template-Driven and Hardware-Centric Cross-Domain E/E Architecture Simulation.
RSP
(2021)
Soobeom Kim
,
Seunghwan Cho
,
Eunhyeok Park
,
Sungjoo Yoo
FPGA Prototyping of Systolic Array-based Accelerator for Low-Precision Inference of Deep Neural Networks.
RSP
(2021)
2020
International Workshop on Rapid System Prototyping, RSP 2020, Hamburg, Germany, September 24-25, 2020
RSP
(2020)
Jean Bruant
,
Pierre-Henri Horrein
,
Olivier Muller
,
Tristan Groléat
,
Frédéric Pétrot
(System)Verilog to Chisel Translation for Faster Hardware Design.
RSP
(2020)
Jérémy Nadal
,
Amer Baghdadi
FPGA based design and prototyping of efficient 5G QC-LDPC channel decoding.
RSP
(2020)
Daniel Gis
,
Nils Büscher
,
Christian Haubelt
Advanced Debugging Architecture for Smart Inertial Sensors using Sensor-in-the-Loop.
RSP
(2020)
Xuzhi Zhang
,
Narendra Prabhu
,
Russell Tessier
NestedNet: A Container-based Prototyping Tool for Hierarchical Software Defined Networks.
RSP
(2020)
Erwan Lenormand
,
Thierry Goubier
,
Loïc Cudennec
,
Henri-Pierre Charles
A combined fast/cycle accurate simulation tool for reconfigurable accelerator evaluation: application to distributed data management.
RSP
(2020)
José D. Domingues
,
Fábio D. L. Coutinho
,
Pedro M. C. Marques
,
Samuel S. Pereira
,
Hugerles S. Silva
,
Arnaldo S. R. Oliveira
MPSoC Fast Prototyping of a Reconfigurable DU Downlink Transmission Chain for 5G New Radio.
RSP
(2020)
Chen Wu
,
Virginie Fresse
,
Benoît Suffran
,
Hubert Konik
Mathematic models based on multiple-criteria decision analysis for tuning industrial CNN in an FPGA computing cluster.
RSP
(2020)
Seyed Alireza Damghani
,
Jean-Philippe Legault
,
Kenneth B. Kent
Desired Footprint by Technology Mapping Modification using a Genetic Algorithm in Odin II.
RSP
(2020)
Erwan Moréac
,
El Mehdi Abdali
,
François Berry
,
Dominique Heller
,
Jean-Philippe Diguet
Hardware-in-the-loop simulation with dynamic partial FPGA reconfiguration applied to computer vision in ROS-based UAV.
RSP
(2020)
2019
Josue V. Quiroga
,
Martí Torrents
,
Nehir Sönmez
,
Dimitris Theodoropoulos
,
Ferad Zyulkyarov
,
Mario Nemirovsky
Evaluation of a Rack-Scale Disaggregated Memory Prototype for Cloud Data Centers.
RSP
(2019)
Derek Yu
,
Michael Vaquier
,
Evan Laflamme
,
Gabrielle Doucette-Poirier
,
Justin Tremblay
,
Brett H. Meyer
ARINC-825TBv2: A Hardware-in-the-Ioop Simulation Platform for Aerospace Security Research.
RSP
(2019)
Salah Eddine Saidi
,
Amir Charif
,
Tanguy Sassolas
,
Pierre-Guillaume Le Guay
,
Henrique Vicente Souza
,
Nicolas Ventroux
Fast Virtual Prototyping of Cyber-Physical Systems using SystemC and FMI: ADAS Use Case.
RSP
(2019)
Louis Bonicel
,
Roland Bohrer
,
Benoit Leprettre
,
Frédéric Rousseau
,
Frédéric Pétrot
Multi-Triggered Embedded Software Code Generation for Electrical Metering and Protection Applications.
RSP
(2019)
Charles Hartsell
,
Nagabhushan Mahadevan
,
Shreyas Ramakrishna
,
Abhishek Dubey
,
Theodore Bapty
,
Taylor T. Johnson
,
Xenofon D. Koutsoukos
,
Janos Sztipanovits
,
Gabor Karsai
CPS Design with Learning-Enabled Components: A Case Study.
RSP
(2019)
Scott Young
,
Alexandrea Demmings
,
Nasrin Eshraghi Ivari
,
Jean-Philippe Legault
,
Kenneth B. Kent
Verilog Loop Unrolling, Module Generation, Part-Select and Arithmetic Right Shift Support in Odin II.
RSP
(2019)
Tobias Strauch
Combining Simulation and FPGA Based Verification to an Affordable and Ultra-Fast Multi-Billion-Gate Verification System.
RSP
(2019)