FPGA Prototyping of Systolic Array-based Accelerator for Low-Precision Inference of Deep Neural Networks.
Soobeom KimSeunghwan ChoEunhyeok ParkSungjoo YooPublished in: RSP (2021)
Keyphrases
- systolic array
- neural network
- reconfigurable architecture
- data flow
- parallel architecture
- parallel implementation
- artificial neural networks
- neural network model
- pattern recognition
- back propagation
- probabilistic inference
- field programmable gate array
- fuzzy logic
- multilayer perceptron
- belief networks
- hardware implementation
- multi layer
- inference process
- bayesian inference
- belief nets
- databases
- image processing
- rapid prototyping
- parallel processing
- genetic algorithm
- database systems