Virginie Fresse

Publication Activity (10 Years)

Years Active: 2000-2024
Publications (10 Years): 23

Top Topics

Network On Chip

Computing Resources

Top Venues

J. Syst. Archit.

Publications

Lucas Grativol, Lubin Gauthier, Mathieu Léonardon, Jérémy Morlier, Antoine Lavrard-Meyer, Guillaume Muller, Virginie Fresse, Matthieu Arzel
PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC. ISCAS (2024)
Lucas Grativol Ribeiro, Lubin Gauthier, Mathieu Léonardon, Jérémy Morlier, Antoine Lavrard-Meyer, Guillaume Muller, Virginie Fresse, Matthieu Arzel
PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC. CoRR (2024)
Lucas Grativol Ribeiro, Mathieu Léonardon, Guillaume Muller, Virginie Fresse, Matthieu Arzel
FLoCoRA: Federated learning compression with low-rank adaptation. CoRR (2024)
Lucas Grativol, Mathieu Léonardon, Guillaume Muller, Virginie Fresse, Matthieu Arzel
Federated learning compression designed for lightweight communications. ICECS (2023)
Lucas Grativol Ribeiro, Mathieu Léonardon, Guillaume Muller, Virginie Fresse, Matthieu Arzel
Federated learning compression designed for lightweight communications. CoRR (2023)
Rym Skhiri, Virginie Fresse, Jihene Malek, Benoît Suffran, Jean-Paul Jamont
An approach for an efficient sharing of IP as a Service in cloud FPGA. SSD (2021)
Chen Wu, Virginie Fresse, Benoît Suffran, Hubert Konik
Accelerating DNNs from local to virtualized FPGA in the Cloud: A survey of trends. J. Syst. Archit. 119 (2021)
Florent Carlier, Virginie Fresse, Jean-Paul Jamont, Loïc Pallardy, Arnaud Rosay
Pooling of Heterogeneous Computing Resources: A Novel Approach based on Multi-Edge-Agent Concept. ICAART (1) (2020)
Florent Carlier, Virginie Fresse, Jean-Paul Jamont, Arnaud Rosay, Loïc Pallardy
A Multi-Edge-Agent System approach for sharing heterogeneous computing resources. VTC Fall (2020)
Chen Wu, Virginie Fresse, Benoît Suffran, Hubert Konik
Mathematic models based on multiple-criteria decision analysis for tuning industrial CNN in an FPGA computing cluster. RSP (2020)
Hatem Belhassen, Heng Zhang, Virginie Fresse, El-Bay Bourennane
Improving Video Object Detection by Seq-Bbox Matching. VISIGRAPP (5: VISAPP) (2019)
Rym Skhiri, Virginie Fresse, Jean-Paul Jamont, Benoît Suffran, Jihene Malek
From FPGA to Support Cloud to Cloud of FPGA: State of the Art. Int. J. Reconfigurable Comput. 2019 (2019)
Rym Skhiri, Virginie Fresse, Jean-Paul Jamont, Benoît Suffran
Challenges of virtualization FPGA in a cloud context. CIVEMSA (2017)
Atef Dorai, Virginie Fresse, Catherine Combes, El-Bay Bourennane, Abdellatif Mtibaa
A collision management structure for NoC deployment on multi-FPGA. Microprocess. Microsystems 49 (2017)
Seher Colak, Emmanuel Dumas, Virginie Fresse, Olivier Alata
Proposition and evaluation of a real-time generic architecture for a laser stripe detection system on FPGA. DASIP (2017)
Dominique Houzet, Virginie Fresse, Hubert Konik
FPGA memory optimization for real-time imaging. DASIP (2016)
Otávio Alcântara de Lima Jr., Weslley N. Costa, Virginie Fresse, Frédéric Rousseau
A survey of NoC evaluation platforms on FPGAs. FPT (2016)
Otávio Alcântara de Lima Jr., Virginie Fresse, Frédéric Rousseau, Hamed Sheibanyrad
Synthesis of dependency-aware traffic generators from NoC simulation traces. J. Syst. Archit. 71 (2016)
Ke Pang, Virginie Fresse, Suying Yao
Communication-aware branch and bound with cluster-based latency-constraint mapping technique on network-on-chip. J. Supercomput. 72 (6) (2016)
Atef Dorai, Virginie Fresse, El-Bay Bourennane, Abdellatif Mtibaa
Differentiated service for NoC-based multimedia applications. ICM (2015)
Matthieu Payet, Virginie Fresse, Frédéric Rousseau, Pascal Remy
Dynamic data flow analysis for NoC based application synthesis. RSP (2015)
Ke Pang, Virginie Fresse, Suying Yao, Otávio Alcântara de Lima Junior
Task mapping and mesh topology exploration for an FPGA-based network on chip. Microprocess. Microsystems 39 (3) (2015)
Virginie Fresse, Catherine Combes, Matthieu Payet, Frédéric Rousseau
Methodological Framework for NoC Resources Dimensioning on FPGAs. FNC/MobiSPC (2015)
Virginie Fresse, Catherine Combes, Hatem Belhasseb
Mathematical Models Applied to On-Chip Network on FPGA for Resource Estimation. CSE (2014)
Atef Dorai, Virginie Fresse, El-Bay Bourennane, Abdellatif Mtibaa
A Novel Architecture for Inter-FPGA Traffic Collision Management. CSE (2014)
Otávio Alcântara de Lima Junior, Virginie Fresse, Frédéric Rousseau
Evaluation of SNMP-like protocol to manage a NoC emulation platform. FPT (2014)
Junyan Tan, Virginie Fresse, Frédéric Rousseau
Adaptive NoC-based MPSoC system for spectral imaging algorithm dedicated to art authentication. EUSIPCO (2013)
Otávio Alcântara de Lima Junior, Virginie Fresse, Frédéric Rousseau
FlexOE: A congestion-aware routing algorithm for NoCs. RSP (2013)
Virginie Fresse, Zhiwei Ge, Junyan Tan, Frédéric Rousseau
Case study: Deployment of the 2D NoC on 3D for the generation of large emulation platforms. RSP (2012)
Virginie Fresse, Zhiwei Ge, Junyan Tan, Frédéric Rousseau
Case study: Deployment of the 2D NoC on 3D for the generation of large emulation platforms. IPTA (2012)
Junyan Tan, Virginie Fresse, Frédéric Rousseau
Generation of emulation platforms for NoC exploration on FPGA. International Symposium on Rapid System Prototyping (2011)
Junyan Tan, Virginie Fresse, Frédéric Rousseau
From mono-FPGA to multi-FPGA emulation platform for NoC performance evaluations. PARCO (2011)
Virginie Fresse, Dominique Houzet, Christophe Gravier
Evaluation of CPU and GPU architectures for spectral image analysis algorithms. Parallel Processing for Imaging Applications (2011)
Virginie Fresse, Junyan Tan, Frédéric Rousseau
Exploration of an adaptive NoC architecture on FPGA dedicated to multi and hysperspectral algorithm for art authentication. IPTA (2010)
Virginie Fresse, Dominique Houzet, Christophe Gravier
GPU architecture evaluation for multispectral and hyperspectral image analysis. DASIP (2010)
Linlin Zhang, Virginie Fresse, Mohammed A. S. Khalid, Dominique Houzet, Anne-Claire Legrand
Evaluation and Design Space Exploration of a Time-Division Multiplexed NoC on FPGA for Image Analysis Applications CoRR (2010)
Linlin Zhang, Virginie Fresse, Mohammed A. S. Khalid, Dominique Houzet, Anne-Claire Legrand
Evaluation and Design Space Exploration of a Time-Division Multiplexed NoC on FPGA for Image Analysis Applications. EURASIP J. Embed. Syst. 2009 (2009)
Linlin Zhang, Virginie Fresse, Anne-Claire Legrand, Mohammed A. S. Khalid
GALS NoC architectures on FPGA dedicated to multispectral image applications. EUSIPCO (2009)
Linlin Zhang, Anne-Claire Legrand, Virginie Fresse, Viktor Fischer
Adaptive FPGA NoC-based Architecture for Multispectral Image Correlation CoRR (2009)
Linlin Zhang, Anne-Claire Legrand, Virginie Fresse, Viktor Fischer
Adaptive FPGA NoC-based Architecture for Multispectral Image Correlation. CGIV/MCS (2008)
Alain Aubert, Nathalie Bochard, Virginie Fresse
An adaptive embedded architecture for real-time Particle Image Velocimetry algorithms CoRR (2008)
Omar Hammami, Zhoukun Wang, Virginie Fresse, Dominique Houzet
A Case Study: Quantitative Evaluation of C-Based High-Level Synthesis Systems. EURASIP J. Embed. Syst. 2008 (2008)
Omar Hammami, Zhoukun Wang, Virginie Fresse, Dominique Houzet
A quantitative evaluation of C-based synthesis on heterogeneous embedded systems design. ISCAS (2008)
Virginie Fresse, Alain Aubert, Nathalie Bochard
A Predictive NoC Architecture for Vision Systems Dedicated to Image Analysis. EURASIP J. Embed. Syst. 2007 (2007)
Zahir Larabi, Linlin Zhang, Virginie Fresse, Anne-Claire Legrand
Rapid prototyping of image analysis algorithms on an adaptive FGPA architecture. EUSIPCO (2007)
Nathalie Bochard, Alain Aubert, Virginie Fresse
An adaptive and predictive architecture for parameterised PIV algorithms. FPT (2006)
Alain Aubert, Nathalie Bochard, Virginie Fresse
Anadaptive embedded architecture for real-time Particle Image Velocimetry algorithms. EUSIPCO (2006)
Virginie Fresse, Nathalie Bochard, Alain Aubert
System on chip FPGA designs of a parameterized particle image velocimetry algorithm. ISCAS (2006)
Virginie Fresse, Stephen Marshall, Olivier Déforges
A high-level development tool dedicated to the generation of cores for the implementation of image processing applications. EUSIPCO (2002)
Jean-François Nezan, Virginie Fresse, Olivier Déforges, Mickaël Raulet
A VsynDEx Methodology for Fast Prototyping of Multi-C6x DSP Architectures. PDPTA (2002)
Virginie Fresse, Olivier Déforges, Jean-François Nezan
AVSynDEx: A Rapid Prototyping Process Dedicated to the Implementation of Digital Image Processing Applications on Multi-DSP and FPGA Architectures. EURASIP J. Adv. Signal Process. 2002 (9) (2002)
Virginie Fresse, Olivier Déforges
ARIAL: Rapid Prototyping for Mixed and Parallel Platforms. Parallel Comput. 28 (7-8) (2002)
Virginie Fresse, Olivier Déforges, Mustapha Assouil
Rapid prototyping for mixed architectures. ICASSP (2000)
Virginie Fresse, Olivier Déforges, Mustapha Assouil
Prototyping for parallel and mixed architectures. Implementation of a new image compression method: LAR. PDPTA (2000)