Fearghal Morgan

Publication Activity (10 Years)

Years Active: 2001-2023
Publications (10 Years): 9

Top Topics

Spiking Neurons

Top Venues

Frontiers Neuroinformatics

Publications

Fearghal Morgan, John Patrick Byrne, Abishek Bupathi, Roshan George, Muhammad Adnan Elahi, Frank Callaly, Sean Kelly, Declan O'Loughlin
HDLGen-ChatGPT Case Study: RISC-V Processor VHDL and Verilog Model - Testbench and EDA Project Generation. RSP (2023)
Fearghal Morgan, Arthur Beretta, Ian Gallivan, Joseph Clancy, Frédéric Rousseau, Roshan George, László Bakó, Frank Callaly
RISC-V Online Tutor. REV (2021)
Gorka Epelde, Fearghal Morgan, Andoni Mujika, Frank Callaly, Peter Leskovský, Brian McGinley, Roberto Álvarez, Axel W. Blau, Finn Krewer
Web-Based Interfaces for Virtual C. elegans Neuron Model Definition, Network Configuration, Behavioral Experiment Definition and Experiment Results Visualization. Frontiers Neuroinformatics 12 (2018)
Fearghal Morgan, Declan O'Loughlin, Jeremy Audiger, Yohan Boyer, Niall Timlin-Canning, Krzysztof Kepa, Seamus Cawley, Ian Gallivan, László Bakó, Frank Callaly
Vicilogic 2.0: Online Learning and Prototyping of Digital Systems Using PYNQ-Z1/-Z2 SoC. RSP (2018)
Fearghal Morgan, Declan O'Loughlin, Jeremy Audiger, Yohan Boyer, Frank Callaly
viciLogic2.0 Online Learning and Prototyping Using PYNQ. FPL (2018)
László Bakó, Szabolcs Hajdú, Fearghal Morgan
Evaluation and Comparison of Low FPGA Footprint, Embedded Soft-Core Processors. MACRo (2017)
Sandeep Pande, Fearghal Morgan, Finn Krewer, Jim Harkin, Liam McDaid, Brian McGinley
Rapid application prototyping for hardware modular spiking neural network architectures. Neural Comput. Appl. 28 (9) (2017)
Robert Moni, László Bakó, Szabolcs Hajdú, Fearghal Morgan, Sándor-Tihamér Brassai
Embedded Real-time Implementation of a Computational Efficient Optical Flow Extraction Method for Intelligent Robot Control Applications. AICS (2016)
George Martin, Jim Harkin, Liam McDaid, John J. Wade, Junxiu Liu, Fearghal Morgan
Astrocyte to spiking neuron communication using Networks-on-Chip ring topology. SSCI (2016)
Fearghal Morgan, Finn Krewer, Frank Callaly, Aedan Coffey, Brian Mc Ginley
Web-enabled Neuron Model Hardware Implementation and Testing. NEUROTECHNIX (2015)
Axel W. Blau, Frank Callaly, Seamus Cawley, Aedan Coffey, Alessandro De Mauro, Gorka Epelde, Lorenzo Ferrara, Finn Krewer, Carlo Liberale, Pedro Machado, Gregory Maclair, Thomas Martin McGinnity, Fearghal Morgan, Andoni Mujika, Alessandro Petrushin, Gautier Robin, John J. Wade
The Si elegans Project - The Challenges and Prospects of Emulating Caenorhabditis elegans. Living Machines (2014)
Axel W. Blau, Frank Callaly, Seamus Cawley, Aedan Coffey, Alessandro De Mauro, Gorka Epelde, Lorenzo Ferrara, Finn Krewer, Carlo Liberale, Pedro Machado, Gregory Maclair, Thomas Martin McGinnity, Fearghal Morgan, Andoni Mujika, Alexey Petrushin, Gautier Robin, John J. Wade
Exploring Neural Principles with Si elegans, a Neuromimetic Representation of the Nematode Caenorhabditis elegans. NEUROTECHNIX (2014)
Finn Krewer, Aedan Coffey, Frank Callaly, Fearghal Morgan
Neuron Models in FPGA Hardware - A Route from High Level Descriptions to Hardware Implementations. NEUROTECHNIX (2014)
John Maher, Fearghal Morgan, Colm O'Riordan, Brian McGinley
The Influence of Cell Type on Artificial Development. ECAL (2013)
Sandeep Pande, Fearghal Morgan, Seamus Cawley, Tom M. Bruintjes, Gerard J. M. Smit, Brian McGinley, Snaider Carrillo, Jim Harkin, Liam McDaid
Modular Neural Tile Architecture for Compact Embedded Hardware Spiking Neural Network. Neural Process. Lett. 38 (2) (2013)
Snaider Carrillo, Jim Harkin, Liam McDaid, Fearghal Morgan, Sandeep Pande, Seamus Cawley, Brian McGinley
Scalable Hierarchical Network-on-Chip Architecture for Spiking Neural Network Hardware Implementations. IEEE Trans. Parallel Distributed Syst. 24 (12) (2013)
Sandeep Pande, Fearghal Morgan, Gerard J. M. Smit, Tom M. Bruintjes, Jochem H. Rutgers, Brian McGinley, Seamus Cawley, Jim Harkin, Liam McDaid
Fixed latency on-chip interconnect for hardware spiking neural network architectures. Parallel Comput. 39 (9) (2013)
Snaider Carrillo, Jim Harkin, Liam McDaid, Sandeep Pande, Seamus Cawley, Brian McGinley, Fearghal Morgan
Advancing interconnect density for spiking neural network hardware implementations using traffic-aware adaptive network-on-chip routers. Neural Networks 33 (2012)
Snaider Carrillo, Jim Harkin, L. J. McDaid, Sandeep Pande, Seamus Cawley, Brian McGinley, Fearghal Morgan
Hierarchical Network-on-Chip and Traffic Compression for Spiking Neural Network Implementations. NOCS (2012)
Fearghal Morgan, Seamus Cawley, David Newell
Remote FPGA Lab for Enhancing Learning of Digital Systems. ACM Trans. Reconfigurable Technol. Syst. 5 (3) (2012)
Brian McGinley, John Maher, Colm O'Riordan, Fearghal Morgan
Maintaining Healthy Population Diversity Using Adaptive Crossover, Mutation, and Selection. IEEE Trans. Evol. Comput. 15 (5) (2011)
Fearghal Morgan, Seamus Cawley, Frank Callaly, Shane Agnew, Patrick Rocke, Martin O'Halloran, Nina Drozd, Krzysztof Kepa, Brian McGinley
Remote FPGA Lab with Interactive Control and Visualisation Interface. FPL (2011)
Sandeep Pande, Fearghal Morgan, Seamus Cawley, Brian McGinley, Jim Harkin, Snaider Carrillo, Liam McDaid
Addressing the Hardware Resource Requirements of Network-on-chip based Neural Architectures. IJCCI (NCTA) (2011)
Krzysztof Kepa, Fearghal Morgan, Peter Athanas
ERDB: An Embedded Routing Database for Reconfigurable Systems. FPL (2011)
Seamus Cawley, Fearghal Morgan, Brian McGinley, Sandeep Pande, Liam McDaid, Snaider Carrillo, Jim Harkin
Hardware spiking neural network prototyping and application. Genet. Program. Evolvable Mach. 12 (3) (2011)
Snaider Carrillo, Jim Harkin, Liam McDaid, Sandeep Pande, Seamus Cawley, Fearghal Morgan
Adaptive Routing Strategies for Large Scale Spiking Neural Network Hardware Implementations. ICANN (1) (2011)
Fearghal Morgan, Seamus Cawley
Enhancing learning of digital systems using a remote FPGA lab. ReCoSoC (2011)
Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Tomasz Surmacz
SeReCon: a secure reconfiguration controller for self-reconfigurable systems. Int. J. Crit. Comput. Based Syst. 1 (1/2/3) (2010)
Snaider Carrillo, Jim Harkin, Liam McDaid, Sandeep Pande, Fearghal Morgan
An Efficient, High-Throughput Adaptive NoC Router for Large Scale Spiking Neural Network Hardware Implementations. ICES (2010)
Sandeep Pande, Fearghal Morgan, Seamus Cawley, Brian McGinley, Snaider Carrillo, Jim Harkin, Liam McDaid
EMBRACE-SysC for analysis of NoC-based Spiking Neural Network architectures. SoC (2010)
Roger F. Woods, Jürgen Becker, Peter Athanas, Fearghal Morgan
Guest Editorial ARC 2009. ACM Trans. Reconfigurable Technol. Syst. 4 (1) (2010)
Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Lars Braun, Michael Hübner, Jürgen Becker
Design Assurance Strategy and Toolset for Partially Reconfigurable FPGA Systems. ACM Trans. Reconfigurable Technol. Syst. 4 (1) (2010)
Jim Harkin, Fearghal Morgan, Liam McDaid, Steve Hall, Brian McGinley, Seamus Cawley
A Reconfigurable and Biologically Inspired Paradigm for Computation Using Network-On-Chip and Spiking Neural Networks. Int. J. Reconfigurable Comput. 2009 (2009)
John Maher, Fearghal Morgan, Oisin Mac Aodha
Evolving plastic responses in artificial cell models. IEEE Congress on Evolutionary Computation (2009)
Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz
IP protection in Partially Reconfigurable FPGAs. FPL (2009)
Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Lars Braun, Michael Hübner, Jürgen Becker
FPGA Analysis Tool: High-Level Flows for Low-Level Design Analysis in Reconfigurable Computing. ARC (2009)
Brian McGinley, Fearghal Morgan, Colm O'Riordan
Maintaining diversity through adaptive selection, crossover and mutation. GECCO (2008)
Brian McGinley, Patrick Rocke, Fearghal Morgan, John Maher
Reconfigurable analogue hardware evolution of adaptive spiking neural network controllers. GECCO (2008)
Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Tomasz Surmacz
SeReCon: A Secure Dynamic Partial Reconfiguration Controller. ISVLSI (2008)
Jim Harkin, Fearghal Morgan, Steve Hall, Piotr Dudek, Thomas Dowrick, Liam McDaid
Reconfigurable platforms and the challenges for large-scale implementations of spiking neural networks. FPL (2008)
Patrick Rocke, Brian McGinley, John Maher, Fearghal Morgan, Jim Harkin
Investigating the Suitability of FPAAs for Evolved Hardware Spiking Neural Networks. ICES (2008)
Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Tomasz Surmacz
SeReCon: A Trusted Environment for SoPC Design. DepCoS-RELCOMEX (2008)
Krzysztof Kosciuszkiewicz, Fearghal Morgan, Krzysztof Kepa
Run-Time Management of Reconfigurable Hardware Tasks Using Embedded Linux. FPT (2007)
Patrick Rocke, Brian McGinley, Fearghal Morgan, John Maher
Reconfigurable Hardware Evolution Platform for a Spiking Neural Network Robotics Controller. ARC (2007)
John Maher, Brian McGinley, Patrick Rocke, Fearghal Morgan
Intrinsic Hardware Evolution of Neural Networks in Reconfigurable Analogue and Digital Devices. FCCM (2006)
Krzysztof Kosciuszkiewicz, Krzysztof Kepa, Fearghal Morgan
Transparent Management of Reconfigurable Hardware in Embedded Operating Systems. ISVLSI (2006)
Patrick Rocke, John Maher, Fearghal Morgan
Platform for intrinsic evolution of analogue neural networks. ReConFig (2005)
Fearghal Morgan, Patrick Rocke, Martin O'Halloran
Applied VHDL training methodology, EDA framework and hardware implementation platform. ReConFig (2005)
Peter McCurry, Fearghal Morgan, Liam Kilmartin
Xilinx FPGA implementation of an image classifier for object detection applications. ICIP (3) (2001)