Seamus Cawley

Publication Activity (10 Years)

Years Active: 2009-2018
Publications (10 Years): 1

Top Topics

Hardware Implementation

Content Addressable Memory

Enhancing Learning

Top Venues

ACM Trans. Reconfigurable Technol. Syst.

Neural Process. Lett.

Publications

Fearghal Morgan, Declan O'Loughlin, Jeremy Audiger, Yohan Boyer, Niall Timlin-Canning, Krzysztof Kepa, Seamus Cawley, Ian Gallivan, László Bakó, Frank Callaly
Vicilogic 2.0: Online Learning and Prototyping of Digital Systems Using PYNQ-Z1/-Z2 SoC. RSP (2018)
Axel W. Blau, Frank Callaly, Seamus Cawley, Aedan Coffey, Alessandro De Mauro, Gorka Epelde, Lorenzo Ferrara, Finn Krewer, Carlo Liberale, Pedro Machado, Gregory Maclair, Thomas Martin McGinnity, Fearghal Morgan, Andoni Mujika, Alessandro Petrushin, Gautier Robin, John J. Wade
The Si elegans Project - The Challenges and Prospects of Emulating Caenorhabditis elegans. Living Machines (2014)
Axel W. Blau, Frank Callaly, Seamus Cawley, Aedan Coffey, Alessandro De Mauro, Gorka Epelde, Lorenzo Ferrara, Finn Krewer, Carlo Liberale, Pedro Machado, Gregory Maclair, Thomas Martin McGinnity, Fearghal Morgan, Andoni Mujika, Alexey Petrushin, Gautier Robin, John J. Wade
Exploring Neural Principles with Si elegans, a Neuromimetic Representation of the Nematode Caenorhabditis elegans. NEUROTECHNIX (2014)
Sandeep Pande, Fearghal Morgan, Seamus Cawley, Tom M. Bruintjes, Gerard J. M. Smit, Brian McGinley, Snaider Carrillo, Jim Harkin, Liam McDaid
Modular Neural Tile Architecture for Compact Embedded Hardware Spiking Neural Network. Neural Process. Lett. 38 (2) (2013)
Snaider Carrillo, Jim Harkin, Liam McDaid, Fearghal Morgan, Sandeep Pande, Seamus Cawley, Brian McGinley
Scalable Hierarchical Network-on-Chip Architecture for Spiking Neural Network Hardware Implementations. IEEE Trans. Parallel Distributed Syst. 24 (12) (2013)
Sandeep Pande, Fearghal Morgan, Gerard J. M. Smit, Tom M. Bruintjes, Jochem H. Rutgers, Brian McGinley, Seamus Cawley, Jim Harkin, Liam McDaid
Fixed latency on-chip interconnect for hardware spiking neural network architectures. Parallel Comput. 39 (9) (2013)
Snaider Carrillo, Jim Harkin, Liam McDaid, Sandeep Pande, Seamus Cawley, Brian McGinley, Fearghal Morgan
Advancing interconnect density for spiking neural network hardware implementations using traffic-aware adaptive network-on-chip routers. Neural Networks 33 (2012)
Snaider Carrillo, Jim Harkin, L. J. McDaid, Sandeep Pande, Seamus Cawley, Brian McGinley, Fearghal Morgan
Hierarchical Network-on-Chip and Traffic Compression for Spiking Neural Network Implementations. NOCS (2012)
Fearghal Morgan, Seamus Cawley, David Newell
Remote FPGA Lab for Enhancing Learning of Digital Systems. ACM Trans. Reconfigurable Technol. Syst. 5 (3) (2012)
Fearghal Morgan, Seamus Cawley, Frank Callaly, Shane Agnew, Patrick Rocke, Martin O'Halloran, Nina Drozd, Krzysztof Kepa, Brian McGinley
Remote FPGA Lab with Interactive Control and Visualisation Interface. FPL (2011)
Sandeep Pande, Fearghal Morgan, Seamus Cawley, Brian McGinley, Jim Harkin, Snaider Carrillo, Liam McDaid
Addressing the Hardware Resource Requirements of Network-on-chip based Neural Architectures. IJCCI (NCTA) (2011)
Seamus Cawley, Fearghal Morgan, Brian McGinley, Sandeep Pande, Liam McDaid, Snaider Carrillo, Jim Harkin
Hardware spiking neural network prototyping and application. Genet. Program. Evolvable Mach. 12 (3) (2011)
Snaider Carrillo, Jim Harkin, Liam McDaid, Sandeep Pande, Seamus Cawley, Fearghal Morgan
Adaptive Routing Strategies for Large Scale Spiking Neural Network Hardware Implementations. ICANN (1) (2011)
Fearghal Morgan, Seamus Cawley
Enhancing learning of digital systems using a remote FPGA lab. ReCoSoC (2011)
Sandeep Pande, Fearghal Morgan, Seamus Cawley, Brian McGinley, Snaider Carrillo, Jim Harkin, Liam McDaid
EMBRACE-SysC for analysis of NoC-based Spiking Neural Network architectures. SoC (2010)
Jim Harkin, Fearghal Morgan, Liam McDaid, Steve Hall, Brian McGinley, Seamus Cawley
A Reconfigurable and Biologically Inspired Paradigm for Computation Using Network-On-Chip and Spiking Neural Networks. Int. J. Reconfigurable Comput. 2009 (2009)