Hardware-in-the-loop simulation with dynamic partial FPGA reconfiguration applied to computer vision in ROS-based UAV.
Erwan MoréacEl Mehdi AbdaliFrançois BerryDominique HellerJean-Philippe DiguetPublished in: RSP (2020)
Keyphrases
- computer vision
- image processing
- hardware implementation
- low cost
- real time
- machine learning
- object recognition
- pattern recognition
- hardware architecture
- field programmable gate array
- dynamic environments
- hardware software
- hardware design
- hardware and software
- object detection
- camera calibration
- vision system
- signal processing
- high speed
- digital signal processing
- software implementation
- artificial fish