Polynomial Formal Verification of a Processor: A RISC-V Case Study.
Lennart WeingartenAlireza MahzoonMehran GoliRolf DrechslerPublished in: ISQED (2023)
Keyphrases
- formal verification
- case study
- instruction set
- functional verification
- model checking
- model checker
- application specific
- automated verification
- bounded model checking
- floating point
- symbolic model checking
- computer architecture
- high speed
- computation intensive
- parallel processing
- general purpose
- program slicing
- real world
- development process
- temporal logic
- low cost
- linear temporal logic