Hans-Joachim Wunderlich

ORCID

Publication Activity (10 Years)

Years Active: 1985-2024
Publications (10 Years): 87

Top Venues

Publications

Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich
Workload-Aware Periodic Interconnect BIST. IEEE Des. Test 41 (4) (2024)
Hanieh Jafarzadeh, Florian Klemme, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
Vmin Testing under Variations: Defect vs. Fault Coverage. LATS (2024)
Hanieh Jafarzadeh, Florian Klemme, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
Time and Space Optimized Storage-based BIST under Multiple Voltages and Variations. ETS (2024)
Payam Habiby, Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich, Sebastian Huhn, Rolf Drechsler
Synthesis of IJTAG Networks for Multi-Power Domain Systems on Chips. ETS (2023)
Somayeh Sadeghi Kohan, Jan Dennis Reimer, Sybille Hellebrand, Hans-Joachim Wunderlich
Optimizing the Streaming of Sensor Data with Approximate Communication. ATS (2023)
Hans-Joachim Wunderlich, Hanieh Jafarzadeh, Alexandra Kourfali, Natalia Lylina, Zahra Paria Najafi-Haghi
Test Aspects of System Health State Monitoring. LATS (2023)
Natalia Lylina, Stefan Holst, Hanieh Jafarzadeh, Alexandra Kourfali, Hans-Joachim Wunderlich
Guardband Optimization for the Preconditioned Conjugate Gradient Algorithm. DSN-W (2023)
Natalia Lylina, Stefan Holst, Hanieh Jafarzadeh, Alexandra Kourfali, Hans-Joachim Wunderlich
Exploiting the Error Resilience of the Preconditioned Conjugate Gradient Method for Energy and Delay Optimization. IOLTS (2023)
Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich
Low Power Streaming of Sensor Data Using Gray Code-Based Approximate Communication. DSN-W (2023)
Hanieh Jafarzadeh, Florian Klemme, Jan Dennis Reimer, Zahra Paria Najafi-Haghi, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
Robust Pattern Generation for Small Delay Faults Under Process Variations. ITC (2023)
Zahra Paria Najafi-Haghi, Hans-Joachim Wunderlich
Identifying Resistive Open Defects in Embedded Cells under Variations. J. Electron. Test. 39 (1) (2023)
Zahra Paria Najafi-Haghi, Florian Klemme, Hanieh Jafarzadeh, Hussam Amrouch, Hans-Joachim Wunderlich
Robust Resistive Open Defect Identification Using Machine Learning with Efficient Feature Selection. DATE (2023)
Zahra Paria Najafi-Haghi, Florian Klemme, Hussam Amrouch, Hans-Joachim Wunderlich
On Extracting Reliability Information from Speed Binning. ETS (2022)
Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich
SCAR: Security Compliance Analysis and Resynthesis of Reconfigurable Scan Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (12) (2022)
Yiwen Liao, Zahra Paria Najafi-Haghi, Hans-Joachim Wunderlich, Bin Yang
Efficient and Robust Resistive Open Defect Detection Based on Unsupervised Deep Learning. ITC (2022)
Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich
Online Periodic Test of Reconfigurable Scan Networks. ATS (2022)
Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich
A Complete Design-for-Test Scheme for Reconfigurable Scan Networks. J. Electron. Test. 38 (6) (2022)
Hussam Amrouch, Jens Anders, Steffen Becker, Maik Betka, Gerd Bleher, Peter Domanski, Nourhan Elhamawy, Thomas Ertl, Athanasios Gatzastras, Paul R. Genssler, Sebastian Hasler, Martin Heinrich, André van Hoorn, Hanieh Jafarzadeh, Ingmar Kallfass, Florian Klemme, Steffen Koch, Ralf Küsters, Andrés Lalama, Raphael Latty, Yiwen Liao, Natalia Lylina, Zahra Paria Najafi-Haghi, Dirk Pflüger, Ilia Polian, Jochen Rivoir, Matthias Sauer, Denis Schwachhofer, Steffen Templin, Christian Volmer, Stefan Wagner, Daniel Weiskopf, Hans-Joachim Wunderlich, Bin Yang, Martin Zimmermann
Intelligent Methods for Test and Reliability. DATE (2022)
Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich
Robust Reconfigurable Scan Networks. DATE (2022)
Natalia Lylina, Ahmed Atteya, Hans-Joachim Wunderlich
A Hybrid Protection Scheme for Reconfigurable Scan Networks. VTS (2021)
Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich
Testability-Enhancing Resynthesis of Reconfigurable Scan Networks. ITC (2021)
Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich
Stress-Aware Periodic Test of Interconnects. J. Electron. Test. 37 (5) (2021)
Chih-Hao Wang, Natalia Lylina, Ahmed Atteya, Tong-Yu Hsieh, Hans-Joachim Wunderlich
Concurrent Test of Reconfigurable Scan Networks for Self-Aware Systems. IOLTS (2021)
Zahra Paria Najafi-Haghi, Hans-Joachim Wunderlich
Resistive Open Defect Classification of Embedded Cells under Variations. LATS (2021)
Eric Schneider, Hans-Joachim Wunderlich
GPU-accelerated Time Simulation of Systems with Adaptive Voltage and Frequency Scaling. DATE (2020)
Sebastian Brandhofer, Michael A. Kochte, Hans-Joachim Wunderlich
Synthesis of Fault-Tolerant Reconfigurable Scan Networks. DATE (2020)
Zahra Paria Najafi-Haghi, Marzieh Hashemipour-Nazari, Hans-Joachim Wunderlich
Variation-Aware Defect Characterization at Cell Level. ETS (2020)
Eric Schneider, Hans-Joachim Wunderlich
Switch Level Time Simulation of CMOS Circuits with Adaptive Voltage and Frequency Scaling. VTS (2020)
Stefan Holst, Matthias Kampmann, Alexander Sprenger, Jan Dennis Reimer, Sybille Hellebrand, Hans-Joachim Wunderlich, Xiaoqing Wen
Logic Fault Diagnosis of Hidden Delay Defects. ITC (2020)
Natalia Lylina, Ahmed Atteya, Chih-Hao Wang, Hans-Joachim Wunderlich
Security Preserving Integration and Resynthesis of Reconfigurable Scan Networks. ITC (2020)
Chang Liu, Eric Schneider, Hans-Joachim Wunderlich
Using Programmable Delay Monitors for Wear-Out and Early Life Failure Prediction. DATE (2020)
Matthias Kampmann, Michael A. Kochte, Chang Liu, Eric Schneider, Sybille Hellebrand, Hans-Joachim Wunderlich
Built-In Test for Hidden Delay Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (10) (2019)
Eric Schneider, Hans-Joachim Wunderlich
Multi-level timing and fault simulation on GPUs. Integr. 64 (2019)
Natalia Lylina, Ahmed Atteya, Pascal Raiola, Matthias Sauer, Bernd Becker, Hans-Joachim Wunderlich
Security Compliance Analysis of Reconfigurable Scan Networks. ITC (2019)
Eric Schneider, Hans-Joachim Wunderlich
SWIFT: Switch-Level Fault Simulation on GPUs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (1) (2019)
Pascal Raiola, Benjamin Thiemann, Jan Burchard, Ahmed Atteya, Natalia Lylina, Hans-Joachim Wunderlich, Bernd Becker, Matthias Sauer
On Secure Data Flow in Reconfigurable Scan Networks. DATE (2019)
Stefan Holst, Eric Schneider, Michael A. Kochte, Xiaoqing Wen, Hans-Joachim Wunderlich
Variation-Aware Small Delay Fault Diagnosis on Compressed Test Responses. ITC (2019)
Michael A. Kochte, Hans-Joachim Wunderlich
Self-Test and Diagnosis for Self-Aware Systems. IEEE Des. Test 35 (5) (2018)
Pascal Raiola, Michael A. Kochte, Ahmed Atteya, Laura Rodríguez Gómez, Hans-Joachim Wunderlich, Bernd Becker, Matthias Sauer
Detecting and Resolving Security Violations in Reconfigurable Scan Networks. IOLTS (2018)
Hans-Joachim Wunderlich, Yervant Zorian
Guest Editor's Introduction. IEEE Des. Test 35 (3) (2018)
Eric Schneider, Michael A. Kochte, Hans-Joachim Wunderlich
Multi-level timing simulation on GPUs. ASP-DAC (2018)
Chang Liu, Eric Schneider, Matthias Kampmann, Sybille Hellebrand, Hans-Joachim Wunderlich
Extending Aging Monitors for Early Life and Wear-Out Failure Prevention. ATS (2018)
Ahmed Atteya, Michael A. Kochte, Matthias Sauer, Pascal Raiola, Bernd Becker, Hans-Joachim Wunderlich
Online prevention of security violations in reconfigurable scan networks. ETS (2018)
Sybille Hellebrand, Jörg Henkel, Anand Raghunathan, Hans-Joachim Wunderlich
Guest Editors' Introduction. IEEE Embed. Syst. Lett. 10 (1) (2018)
Daniel Kraak, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Francky Catthoor, Abhijit Chatterjee, Adit D. Singh, Hans-Joachim Wunderlich, Naghmeh Karimi
Device aging: A reliability and security concern. ETS (2018)
Yucong Zhang, Xiaoqing Wen, Stefan Holst, Kohei Miyase, Seiji Kajihara, Hans-Joachim Wunderlich, Jun Qian
Clock-Skew-Aware Scan Chain Grouping for Mitigating Shift Timing Failures in Low-Power Scan Testing. ATS (2018)
Marcus Wagner, Hans-Joachim Wunderlich
Probabilistic sensitization analysis for variation-aware path delay fault test evaluation. ETS (2017)
Eric Schneider, Michael A. Kochte, Stefan Holst, Xiaoqing Wen, Hans-Joachim Wunderlich
GPU-Accelerated Simulation of Small Delay Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (5) (2017)
Chang Liu, Michael A. Kochte, Hans-Joachim Wunderlich
Aging monitor reuse for small delay fault testing. VTS (2017)
Stefan Holst, Eric Schneider, Koshi Kawagoe, Michael A. Kochte, Kohei Miyase, Hans-Joachim Wunderlich, Seiji Kajihara, Xiaoqing Wen
Analysis and mitigation or IR-Drop induced scan shift-errors. ITC (2017)
Gert Schley, Atefe Dalirsani, Marcus Eggenberger, Nadereh Hatami, Hans-Joachim Wunderlich, Martin Radetzki
Multi-Layer Diagnosis for Fault-Tolerant Networks-on-Chip. IEEE Trans. Computers 66 (5) (2017)
Jyotirmoy V. Deshmukh, Wolfgang Kunz, Hans-Joachim Wunderlich, Sybille Hellebrand
Special session on early life failures. VTS (2017)
Dominik Ull, Michael A. Kochte, Hans-Joachim Wunderlich
Structure-Oriented Test of Reconfigurable Scan Networks. ATS (2017)
Alexander Schöll, Claus Braun, Hans-Joachim Wunderlich
Energy-efficient and error-resilient iterative solvers for approximate computing. IOLTS (2017)
Michael A. Kochte, Rafal Baranowski, Hans-Joachim Wunderlich
Trustworthy reconfigurable access to on-chip infrastructure. ITC-Asia (2017)
Michael A. Kochte, Matthias Sauer, Laura Rodríguez Gómez, Pascal Raiola, Bernd Becker, Hans-Joachim Wunderlich
Specification and verification of security in reconfigurable scan networks. ETS (2017)
Hongyan Zhang, Lars Bauer, Michael A. Kochte, Eric Schneider, Hans-Joachim Wunderlich, Jörg Henkel
Aging Resilience and Fault Tolerance in Runtime Reconfigurable Architectures. IEEE Trans. Computers 66 (6) (2017)
Hans-Joachim Wunderlich, Peter C. Maxwell
ETS 2015 best paper. ETS (2016)
Stefan Holst, Eric Schneider, Xiaoqing Wen, Seiji Kajihara, Yuta Yamato, Hans-Joachim Wunderlich, Michael A. Kochte
Timing-Accurate Estimation of IR-Drop Impact on Logic- and Clock-Paths During At-Speed Scan Test. ATS (2016)
Atefe Dalirsani, Hans-Joachim Wunderlich
Functional Diagnosis for Graceful Degradation of NoC Switches. ATS (2016)
Michael A. Kochte, Rafal Baranowski, Marcel Schaal, Hans-Joachim Wunderlich
Test Strategies for Reconfigurable Scan Networks. ATS (2016)
Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich
Efficient Algorithm-Based Fault Tolerance for Sparse Matrix Operations. DSN (2016)
Dominik Erb, Karsten Scheibler, Michael A. Kochte, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker
Mixed 01X-RSL-Encoding for fast and accurate ATPG with unknowns. ASP-DAC (2016)
Alexander Schöll, Claus Braun, Hans-Joachim Wunderlich
Applying efficient fault tolerance to enable the preconditioned conjugate gradient solver on approximate computing hardware. DFT (2016)
Hans-Joachim Wunderlich, Claus Braun, Alexander Schöll
Pushing the limits: How fault tolerance extends the scope of approximate computing. IOLTS (2016)
Eric Schneider, Hans-Joachim Wunderlich
High-Throughput Transistor-Level Fault Simulation on GPUs. ATS (2016)
Michael A. Kochte, Rafal Baranowski, Matthias Sauer, Bernd Becker, Hans-Joachim Wunderlich
Formal verification of secure reconfigurable scan network infrastructure. ETS (2016)
Hans-Joachim Wunderlich, Claus Braun, Alexander Schöll
Fault tolerance of approximate compute algorithms. VTS (2016)
Jin-Cun Ye, Michael A. Kochte, Kuen-Jong Lee, Hans-Joachim Wunderlich
Autonomous Testing for 3D-ICs with IEEE Std. 1687. ATS (2016)
Michael A. Kochte, Hans-Joachim Wunderlich
Dependable on-chip infrastructure for dependable MPSOCs. LATS (2016)
Laura Rodríguez Gómez, Hans-Joachim Wunderlich
A Neural-Network-Based Fault Classifier. ATS (2016)
K. Asada, Xiaoqing Wen, Stefan Holst, Kohei Miyase, Seiji Kajihara, Michael A. Kochte, Eric Schneider, Hans-Joachim Wunderlich, J. Qian
Logic/Clock-Path-Aware At-Speed Scan Test Generation for Avoiding False Capture Failures and Reducing Clock Stretch. ATS (2015)
Matthias Kampmann, Michael A. Kochte, Eric Schneider, Thomas Indlekofer, Sybille Hellebrand, Hans-Joachim Wunderlich
Optimized Selection of Frequencies for Faster-Than-at-Speed Test. ATS (2015)
Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich
Fine-Grained Access Management in Reconfigurable Scan Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (6) (2015)
Lars Bauer, Jörg Henkel, Andreas Herkersdorf, Michael A. Kochte, Johannes Maximilian Kühn, Wolfgang Rosenstiel, Thomas Schweizer, Stefan Wallentowitz, Volker Wenzel, Thomas Wild, Hans-Joachim Wunderlich, Hongyan Zhang
Adaptive multi-layer techniques for increased system dependability. it Inf. Technol. 57 (3) (2015)
Rafal Baranowski, Farshad Firouzi, Saman Kiamehr, Chang Liu, Mehdi Baradaran Tahoori, Hans-Joachim Wunderlich
On-line prediction of NBTI-induced aging rates. DATE (2015)
Hans-Joachim Wunderlich, Martin Radetzki
Multi-Layer Test and Diagnosis for Dependable NoCs. NOCS (2015)
Michael A. Kochte, Atefe Dalirsani, Andrea Bernabei, Martin Omaña, Cecilia Metra, Hans-Joachim Wunderlich
Intermittent and Transient Fault Diagnosis on Sparse Code Signatures. ATS (2015)
Eric Schneider, Stefan Holst, Michael A. Kochte, Xiaoqing Wen, Hans-Joachim Wunderlich
GPU-accelerated small delay fault simulation. DATE (2015)
Chang Liu, Michael A. Kochte, Hans-Joachim Wunderlich
Efficient observation point selection for aging monitoring. IOLTS (2015)
Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich
Efficient on-line fault-tolerance for the preconditioned conjugate gradient method. IOLTS (2015)
Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich
Reconfigurable Scan Networks: Modeling, Verification, and Optimal Pattern Generation. ACM Trans. Design Autom. Electr. Syst. 20 (2) (2015)
Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich
Low-overhead fault-tolerance for the preconditioned conjugate gradient solver. DFTS (2015)
Stefan Holst, Michael E. Imhof, Hans-Joachim Wunderlich
High-Throughput Logic Timing Simulation on GPGPUs. ACM Trans. Design Autom. Electr. Syst. 20 (3) (2015)
Hans-Joachim Wunderlich
Testing visions. ETS (2015)
Dominik Erb, Michael A. Kochte, Sven Reimer, Matthias Sauer, Hans-Joachim Wunderlich, Bernd Becker
Accurate QBF-Based Test Pattern Generation in Presence of Unknown Values. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (12) (2015)
Hongyan Zhang, Michael A. Kochte, Eric Schneider, Lars Bauer, Hans-Joachim Wunderlich, Jörg Henkel
STRAP: Stress-Aware Placement for Aging Mitigation in Runtime Reconfigurable Architectures. ICCAD (2015)
Sybille Hellebrand, Hans-Joachim Wunderlich
SAT-based ATPG beyond stuck-at fault testing. it Inf. Technol. 56 (4) (2014)
Ulrich Abelein, Alejandro Cook, Piet Engelke, Michael Glaß, Felix Reimann, Laura Rodríguez Gómez, Thomas Russ, Jürgen Teich, Dominik Ull, Hans-Joachim Wunderlich
Non-intrusive integration of advanced diagnosis features in automotive E/E-architectures. DATE (2014)
D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Hans-Joachim Wunderlich
A New Hybrid Fault-Tolerant Architecture for Digital CMOS Circuits and Systems. J. Electron. Test. 30 (4) (2014)
Atefe Dalirsani, Michael A. Kochte, Hans-Joachim Wunderlich
Area-efficient synthesis of fault-secure NoC switches. IOLTS (2014)
Nadereh Hatami, Rafal Baranowski, Paolo Prinetto, Hans-Joachim Wunderlich
Multilevel Simulation of Nonfunctional Properties by Piecewise Evaluation. ACM Trans. Design Autom. Electr. Syst. 19 (4) (2014)
Marcus Wagner, Hans-Joachim Wunderlich
Incremental computation of delay fault detection probability for variation-aware test generation. ETS (2014)
Atefe Dalirsani, Nadereh Hatami, Michael E. Imhof, Marcus Eggenberger, Gert Schley, Martin Radetzki, Hans-Joachim Wunderlich
On Covering Structural Defects in NoCs by Functional Tests. ATS (2014)
Felix Reimann, Michael Glaß, Jürgen Teich, Alejandro Cook, Laura Rodríguez Gómez, Dominik Ull, Hans-Joachim Wunderlich, Piet Engelke, Ulrich Abelein
Advanced Diagnosis: SBST and BIST Integration in Automotive E/E Architectures. DAC (2014)
Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich
Verifikation Rekonfigurierbarer Scan-Netze. MBMV (2014)
Matthias Sauer, Ilia Polian, Michael E. Imhof, Abdullah Mumtaz, Eric Schneider, Alexander Czutro, Hans-Joachim Wunderlich, Bernd Becker
Variation-aware deterministic ATPG. ETS (2014)
Claus Braun, Sebastian Halder, Hans-Joachim Wunderlich
A-ABFT: Autonomous Algorithm-Based Fault Tolerance for Matrix Multiplications on Graphics Processing Units. DSN (2014)
Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich
Access Port Protection for Reconfigurable Scan Networks. J. Electron. Test. 30 (6) (2014)
Michael E. Imhof, Hans-Joachim Wunderlich
Bit-Flipping Scan - A unified architecture for fault tolerance and offline test. DATE (2014)

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Publication Activity (10 Years)

Top Topics

Top Venues

Hans-Joachim Wunderlich