Piet Engelke

Publication Activity (10 Years)

Years Active: 2000-2020
Publications (10 Years): 2

Top Topics

Automatic Diagnosis

Friendly Interface

Top Venues

Aspekte der Technischen Informatik

Publications

Manu Baby, Bernd Büttner, Piet Engelke, Ulrike Pfannkuchen, Reinhard Meier, Jonathan Gaudet, J.-F. Côté, Givargis Danialy, Martin Keim, Lori Schramm
IJTAG Through a Two-Pin Chip Interface. ITC (2020)
Artur Jutman, Christophe Lotz, Erik Larsson, Matteo Sonza Reorda, Maksim Jenihhin, Jaan Raik, Hans G. Kerkhoff, Rene Krenz-Baath, Piet Engelke
BASTION: Board and SoC test instrumentation for ageing and no failure found. DATE (2017)
Piet Engelke
Struktureller Test im System. Aspekte der Technischen Informatik (2014)
Ulrich Abelein, Alejandro Cook, Piet Engelke, Michael Glaß, Felix Reimann, Laura Rodríguez Gómez, Thomas Russ, Jürgen Teich, Dominik Ull, Hans-Joachim Wunderlich
Non-intrusive integration of advanced diagnosis features in automotive E/E-architectures. DATE (2014)
Felix Reimann, Michael Glaß, Jürgen Teich, Alejandro Cook, Laura Rodríguez Gómez, Dominik Ull, Hans-Joachim Wunderlich, Piet Engelke, Ulrich Abelein
Advanced Diagnosis: SBST and BIST Integration in Automotive E/E Architectures. DAC (2014)
Tobias Koal, Markus Ulbricht, Piet Engelke, Heinrich Theodor Vierhaus
On the feasibility of combining on-line-test and self repair for logic circuits. DDECS (2013)
Christian Gleichner, Heinrich Theodor Vierhaus, Piet Engelke
Scan Based Tests via Standard Interfaces. DSD (2012)
Piet Engelke, Hermann Obermeir
Funding project DIANA - Integrated diagnostics for the analysis of electronic failures in vehicles. ETS (2012)
Alejandro Czutro, Ilia Polian, Matthew Lewis, Piet Engelke, Sudhakar M. Reddy, Bernd Becker
Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability Analysis. Int. J. Parallel Program. 38 (3-4) (2010)
Piet Engelke, Bernd Becker, Michel Renovell, Jürgen Schlöffel, Bettina Braitling, Ilia Polian
SUPERB: Simulator utilizing parallel evaluation of resistive bridges. ACM Trans. Design Autom. Electr. Syst. 14 (4) (2009)
Alejandro Czutro, Ilia Polian, Matthew Lewis, Piet Engelke, Sudhakar M. Reddy, Bernd Becker
TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis. VLSI Design (2009)
Nicolas Houarche, Mariane Comte, Michel Renovell, Alejandro Czutro, Piet Engelke, Ilia Polian, Bernd Becker
An Electrical Model for the Fault Simulation of Small Delay Faults Caused by Crosstalk Aggravated Resistive Short Defects. VTS (2009)
Alejandro Czutro, Ilia Polian, Piet Engelke, Sudhakar M. Reddy, Bernd Becker
Dynamic Compaction in SAT-Based ATPG. Asian Test Symposium (2009)
Ilia Polian, Kohei Miyase, Yusuke Nakamura, Seiji Kajihara, Piet Engelke, Bernd Becker, Stefan Spinner, Xiaoqing Wen
Diagnosis of Realistic Defects Based on the X-Fault Model. DDECS (2008)
Alejandro Czutro, Nicolas Houarche, Piet Engelke, Ilia Polian, Mariane Comte, Michel Renovell, Bernd Becker
A Simulator of Small-Delay Faults Caused by Resistive-Open Defects. ETS (2008)
Stefan Hillebrecht, Ilia Polian, Piet Engelke, Bernd Becker, Martin Keim, Wu-Tung Cheng
Extraction, Simulation and Test Generation for Interconnect Open Defects Based on Enhanced Aggressor-Victim Model. ITC (2008)
Piet Engelke, Ilia Polian, Michel Renovell, Sandip Kundu, Bharath Seshadri, Bernd Becker
On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (2) (2008)
Stefan Spinner, Ilia Polian, Piet Engelke, Bernd Becker, Martin Keim, Wu-Tung Cheng
Automatic Test Pattern Generation for Interconnect Open Defects. VTS (2008)
Piet Engelke, Ilia Polian, Jürgen Schlöffel, Bernd Becker
Resistive Bridging Fault Simulation of Industrial Circuits. DATE (2008)
Stefan Spinner, Jie Jiang, Ilia Polian, Piet Engelke, Bernd Becker
Simulating Open-Via Defects. ATS (2007)
Piet Engelke, Bettina Braitling, Ilia Polian, Michel Renovell, Bernd Becker
SUPERB: Simulator Utilizing Parallel Evaluation of Resistive Bridges. ATS (2007)
Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker
Simulating Resistive-Bridging and Stuck-At Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (10) (2006)
Yuyi Tang, Hans-Joachim Wunderlich, Piet Engelke, Ilia Polian, Bernd Becker, Jürgen Schlöffel, Friedrich Hapke, Michael Wittke
X-masking during logic BIST and its impact on defect coverage. IEEE Trans. Very Large Scale Integr. Syst. 14 (2) (2006)
Michel Renovell, Mariane Comte, Ilia Polian, Piet Engelke, Bernd Becker
A Specific ATPG technique for Resistive Open with Sequence Recursive Dependency. ATS (2006)
Piet Engelke, Ilia Polian, Hans Manhaeve, Michel Renovell, Bernd Becker
Delta-IDDQ Testing of Resistive Short Defects. ATS (2006)
Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker
Automatic Test Pattern Generation for Resistive Bridging Faults. J. Electron. Test. 22 (1) (2006)
Gang Chen, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski, Piet Engelke, Bernd Becker
A unified fault model and test generation procedure for interconnect opens and bridges. ETS (2005)
Ilia Polian, Sandip Kundu, Jean Marc Gallière, Piet Engelke, Michel Renovell, Bernd Becker
Resistive Bridge Fault Model Evolution from Conventional to Ultra Deep Submicron Technologies. VTS (2005)
Ilia Polian, Piet Engelke, Michel Renovell, Bernd Becker
Modeling Feedback Bridging Faults with Non-Zero Resistance. J. Electron. Test. 21 (1) (2005)
Sandip Kundu, Piet Engelke, Ilia Polian, Bernd Becker
On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing. Asian Test Symposium (2005)
Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker
Automatic test pattern generation for resistive bridging faults. ETS (2004)
Yuyi Tang, Hans-Joachim Wunderlich, Harald P. E. Vranken, Friedrich Hapke, Michael Wittke, Piet Engelke, Ilia Polian, Bernd Becker
X-Masking During Logic BIST and Its Impact on Defect Coverage. ITC (2004)
Piet Engelke, Ilia Polian, Michel Renovell, Bharath Seshadri, Bernd Becker
The Pros and Cons of Very-Low-Voltage Testing: An Analysis based on Resistive Bridging Faults. VTS (2004)
Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker
Simulating Resistive Bridging and Stuck-At Faults. ITC (2003)
Ilia Polian, Piet Engelke, Michel Renovell, Bernd Becker
Modeling feedback bridging faults with non-zero resistance. ETW (2003)
Ilia Polian, Piet Engelke, Bernd Becker
Efficient Bridging Fault Simulation of Sequential Circuits Based on Multi-Valued Logics. ISMVL (2002)
Piet Engelke, Bernd Becker, Martin Keim
A parameterizable fault simulator for bridging faults. ETW (2000)