Maksim Jenihhin

ORCID

Publication Activity (10 Years)

Years Active: 2003-2024
Publications (10 Years): 105

Top Venues

Publications

Mahdi Taheri, Masoud Daneshtalab, Jaan Raik, Maksim Jenihhin, Salvatore Pappalardo, Paul Jiménez, Bastien Deveautour, Alberto Bosio
SAFFIRA: a Framework for Assessing the Reliability of Systolic-Array-Based DNN Accelerators. DDECS (2024)
Mahdi Taheri, Masoud Daneshtalab, Jaan Raik, Maksim Jenihhin, Salvatore Pappalardo, Paul Jiménez, Bastien Deveautour, Alberto Bosio
SAFFIRA: a Framework for Assessing the Reliability of Systolic-Array-Based DNN Accelerators. CoRR (2024)
Mahdi Taheri, Natalia Cherezova, Samira Nazari, Ahsan Rafiq, Ali Azarpeyvand, Tara Ghasempouri, Masoud Daneshtalab, Jaan Raik, Maksim Jenihhin
AdAM: Adaptive Fault-Tolerant Approximate Multiplier for Edge DNN Accelerators. ETS (2024)
Mohammad Hasan Ahmadilivani, Seyedhamidreza Mousavi, Jaan Raik, Masoud Daneshtalab, Maksim Jenihhin
Cost-Effective Fault Tolerance for CNNs Using Parameter Vulnerability Based Hardening and Pruning. IOLTS (2024)
Mohammad Hasan Ahmadilivani, Mahdi Taheri, Jaan Raik, Masoud Daneshtalab, Maksim Jenihhin
A Systematic Literature Review on Hardware Reliability Assessment Methods for Deep Neural Networks. ACM Comput. Surv. 56 (6) (2024)
Mohammad Hasan Ahmadilivani, Seyedhamidreza Mousavi, Jaan Raik, Masoud Daneshtalab, Maksim Jenihhin
Cost-Effective Fault Tolerance for CNNs Using Parameter Vulnerability Based Hardening and Pruning. CoRR (2024)
Maksim Jenihhin, Mahdi Taheri, Natalia Cherezova, Mohammad Hasan Ahmadilivani, Hardi Selg, Artur Jutman, Konstantin Shibin, Anton Tsertov, Sergei Devadze, Rama Mounika Kodamanchili, Ahsan Rafiq, Jaan Raik, Masoud Daneshtalab
Keynote: Cost-Efficient Reliability for Edge-AI Chips. LATS (2024)
Mohammad Hasan Ahmadilivani, Alberto Bosio, Bastien Deveautour, Fernando Fernandes dos Santos, Juan-David Guerrero-Balaguera, Maksim Jenihhin, Angeliki Kritikakou, Robert Limas Sierra, Salvatore Pappalardo, Jaan Raik, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Mahdi Taheri, Marcello Traiola
Special Session: Reliability Assessment Recipes for DNN Accelerators. VTS (2024)
Mahdi Taheri, Natalia Cherezova, Mohammad Saeed Ansari, Maksim Jenihhin, Ali Mahani, Masoud Daneshtalab, Jaan Raik
Exploration of Activation Fault Reliability in Quantized Systolic Array-Based DNN Accelerators. CoRR (2024)
Mahdi Taheri, Natalia Cherezova, Samira Nazari, Ahsan Rafiq, Ali Azarpeyvand, Tara Ghasempouri, Masoud Daneshtalab, Jaan Raik, Maksim Jenihhin
AdAM: Adaptive Fault-Tolerant Approximate Multiplier for Edge DNN Accelerators. CoRR (2024)
Seyedhamidreza Mousavi, Mohammad Hasan Ahmadilivani, Jaan Raik, Maksim Jenihhin, Masoud Daneshtalab
ProAct: Progressive Training for Hybrid Clipped Activation Function to Enhance Resilience of DNNs. CoRR (2024)
Mahdi Taheri, Natalia Cherezova, Mohammad Saeed Ansari, Maksim Jenihhin, Ali Mahani, Masoud Daneshtalab, Jaan Raik
Exploration of Activation Fault Reliability in Quantized Systolic Array-Based DNN Accelerators. ISQED (2024)
Mohammad Reza Heidari Iman, Jaan Raik, Maksim Jenihhin, Gert Jervan, Tara Ghasempouri
An automated method for mining high-quality assertion sets. Microprocess. Microsystems 97 (2023)
Konstantin Shibin, Maksim Jenihhin, Artur Jutman, Sergei Devadze, Anton Tsertov
On-Chip Sensors Data Collection and Analysis for SoC Health Management. DFT (2023)
Dadmehr Rahbari, Muhammad Mahtab Alam, Yannick Le Moullec, Maksim Jenihhin
Applying RIS-Based Communication for Collaborative Computing in a Swarm of Drones. IEEE Access 11 (2023)
Tanvir Ahmad Tarique, Foisal Ahmed, Maksim Jenihhin, Liakot Ali
Unsupervised Recycled FPGA Detection Using Symmetry Analysis. CoRR (2023)
Mohammad Hasan Ahmadilivani, Mahdi Taheri, Jaan Raik, Masoud Daneshtalab, Maksim Jenihhin
DeepVigor: Vulnerability Value Ranges and Factors for DNNs' Reliability Assessment. CoRR (2023)
Mohammad Hasan Ahmadilivani, Mahdi Taheri, Jaan Raik, Masoud Daneshtalab, Maksim Jenihhin
DeepVigor: VulnerabIlity Value RanGes and FactORs for DNNs' Reliability Assessment. ETS (2023)
Mohammad Hasan Ahmadilivani, Mahdi Taheri, Jaan Raik, Masoud Daneshtalab, Maksim Jenihhin
Enhancing Fault Resilience of QNNs by Selective Neuron Splitting. CoRR (2023)
Mohammad Hasan Ahmadilivani, Mario Barbareschi, Salvatore Barone, Alberto Bosio, Masoud Daneshtalab, Salvatore Della Torca, Gabriele Gavarini, Maksim Jenihhin, Jaan Raik, Annachiara Ruospo, Ernesto Sánchez, Mahdi Taheri
Special Session: Approximation and Fault Resiliency of DNN Accelerators. VTS (2023)
Xinhui Lai, Maksim Jenihhin
Analyzing Side-Channel Attack Vulnerabilities at RTL. LATS (2023)
Mahdi Taheri, Mohammad Riazati, Mohammad Hasan Ahmadilivani, Maksim Jenihhin, Masoud Daneshtalab, Jaan Raik, Mikael Sjödin, Björn Lisper
DeepAxe: A Framework for Exploration of Approximation and Reliability Trade-offs in DNN Accelerators. CoRR (2023)
Mohammad Hasan Ahmadilivani, Mahdi Taheri, Jaan Raik, Masoud Daneshtalab, Maksim Jenihhin
A Systematic Literature Review on Hardware Reliability Assessment Methods for Deep Neural Networks. CoRR (2023)
Mahdi Taheri, Mohammad Hasan Ahmadilivani, Maksim Jenihhin, Masoud Daneshtalab, Jaan Raik
APPRAISER: DNN Fault Resilience Analysis Employing Approximation Errors. DDECS (2023)
Mohammad Hasan Ahmadilivani, Mahdi Taheri, Jaan Raik, Masoud Daneshtalab, Maksim Jenihhin
Enhancing Fault Resilience of QNNs by Selective Neuron Splitting. AICAS (2023)
Foisal Ahmed, Maksim Jenihhin
Holistic IJTAG-based External and Internal Fault Monitoring in UAVs. LATS (2023)
Hardi Selg, Maksim Jenihhin, Peeter Ellervee, Jaan Raik
ML-Based Online Design Error Localization for RISC-V Implementations. IOLTS (2023)
Mohammad Hasan Ahmadilivani, Mario Barbareschi, Salvatore Barone, Alberto Bosio, Masoud Daneshtalab, Salvatore Della Torca, Gabriele Gavarini, Maksim Jenihhin, Jaan Raik, Annachiara Ruospo, Ernesto Sánchez, Mahdi Taheri
Special Session: Approximation and Fault Resiliency of DNN Accelerators. CoRR (2023)
Mahdi Taheri, Saeideh Sheikhpour, Ali Mahani, Maksim Jenihhin
A Novel Fault-Tolerant Logic Style with Self-Checking Capability. CoRR (2023)
Mahdi Taheri, Mohammad Hasan Ahmadilivani, Maksim Jenihhin, Masoud Daneshtalab, Jaan Raik
APPRAISER: DNN Fault Resilience Analysis Employing Approximation Errors. CoRR (2023)
Foisal Ahmed, Maksim Jenihhin
Holistic IJTAG-based External and Internal Fault Monitoring in UAVs. CoRR (2023)
Mahdi Taheri, Mohammad Riazati, Mohammad Hasan Ahmadilivani, Maksim Jenihhin, Masoud Daneshtalab, Jaan Raik, Mikael Sjödin, Björn Lisper
DeepAxe: A Framework for Exploration of Approximation and Reliability Trade-offs in DNN Accelerators. ISQED (2023)
Konstantin Shibin, Maksim Jenihhin, Artur Jutman, Sergei Devadze, Anton Tsertov
On-Chip Sensors Data Collection and Analysis for SoC Health Management. CoRR (2023)
Cemil Cem Gürsoy, Daniel Kraak, Foisal Ahmed, Mottaqiallah Taouil, Maksim Jenihhin, Said Hamdioui
On BTI Aging Rejuvenation in Memory Address Decoders. CoRR (2022)
Mahdi Taheri, Saeideh Sheikhpour, Ali Mahani, Maksim Jenihhin
A Novel Fault-Tolerant Logic Style with Self-Checking Capability. IOLTS (2022)
Cemil Cem Gürsoy, Daniel Kraak, Foisal Ahmed, Mottaqiallah Taouil, Maksim Jenihhin, Said Hamdioui
On BTI Aging Rejuvenation in Memory Address Decoders. LATS (2022)
Nooshin Nosrati, Maksim Jenihhin, Zainalabedin Navabi
MLC: A Machine Learning Based Checker For Soft Error Detection In Embedded Processors. IOLTS (2022)
Adeboye Stephen Oyeniran, Maksim Jenihhin, Jaan Raik, Raimund Ubar
High-Level Fault Diagnosis in RISC Processors with Implementation-Independent Functional Test. ISVLSI (2022)
Foisal Ahmed, Maksim Jenihhin
A Survey on UAV Computing Platforms: A Hardware Reliability Perspective. Sensors 22 (16) (2022)
Mohammad Reza Heidari Iman, Jaan Raik, Maksim Jenihhin, Gert Jervan, Tara Ghasempouri
A Methodology for Automated Mining of Compact and Accurate Assertion Sets. NorCAS (2021)
Aneesh Balakrishnan, Guilherme Cardoso Medeiros, Cemil Cem Gürsoy, Said Hamdioui, Maksim Jenihhin, Dan Alexandrescu
Modeling Soft-Error Reliability Under Variability. DFT (2021)
Ahmet Cagri Bagbaba, Maksim Jenihhin, Raimund Ubar, Christian Sauer
Representing Gate-Level SET Faults by Multiple SEU Faults at RTL. CoRR (2021)
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Maksim Jenihhin
Composing Graph Theory and Deep Neural Networks to Evaluate SEU Type Soft Error Effects. CoRR (2021)
Maksim Jenihhin, Adeboye Stephen Oyeniran, Jaan Raik, Raimund Ubar
Implementation-Independent Test Generation for a Large Class of Faults in RISC Processor Modules. DSD (2021)
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Maksim Jenihhin
Modeling Gate-Level Abstraction Hierarchy Using Graph Convolutional Neural Networks to Predict Functional De-Rating Factors. CoRR (2021)
Aneesh Balakrishnan, Dan Alexandrescu, Maksim Jenihhin, Thomas Lange, Maximilien Glorieux
Gate-Level Graph Representation Learning: A Step Towards the Improved Stuck-at Faults Analysis. ISQED (2021)
Dadmehr Rahbari, Muhammad Mahtab Alam, Yannick Le Moullec, Maksim Jenihhin
Fast and Fair Computation Offloading Management in a Swarm of Drones Using a Rating-Based Federated Learning Approach. IEEE Access 9 (2021)
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Maksim Jenihhin
The Validation of Graph Model-Based, Gate Level Low-Dimensional Feature Data for Machine Learning Applications. CoRR (2021)
Dadmehr Rahbari, Muhammad Mahtab Alam, Yannick Le Moullec, Maksim Jenihhin
Edge-to-Fog Collaborative Computing in a Swarm of Drones. MEDI Workshops (2021)
Hardi Selg, Maksim Jenihhin, Peeter Ellervee
JÄNES: A NAS Framework for ML-based EDA Applications. DFT (2021)
Xinhui Lai, Thomas Lange, Aneesh Balakrishnan, Dan Alexandrescu, Maksim Jenihhin
On Antagonism Between Side-Channel Security and Soft-Error Reliability in BNN Inference Engines. VLSI-SoC (2021)
Xinhui Lai, Maksim Jenihhin, Jaan Raik, Kolin Paul
PASCAL: Timing SCA Resistant Design and Verification Flow. CoRR (2020)
Cemil Cem Gürsoy, Maksim Jenihhin, Adeboye Stephen Oyeniran, Davide Piumatti, Jaan Raik, Matteo Sonza Reorda, Raimund Ubar
New categories of Safe Faults in a processor-based Embedded System. CoRR (2020)
Ahmet Cagri Bagbaba, Maksim Jenihhin, Jaan Raik, Christian Sauer
Efficient Fault Injection based on Dynamic HDL Slicing Technique. CoRR (2020)
Lembit Jürimägi, Raimund Ubar, Maksim Jenihhin, Jaan Raik
Calculation of probabilistic testability measures for digital circuits with Structurally Synthesized BDDs. Microprocess. Microsystems 77 (2020)
Hardi Selg, Maksim Jenihhin, Peeter Ellervee
Wafer-Level Die Re-Test Success Prediction Using Machine Learning. LATS (2020)
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik
High-Level Implementation-Independent Functional Software-Based Self-Test for RISC Processors. J. Electron. Test. 36 (1) (2020)
Xinhui Lai, Maksim Jenihhin, Georgios N. Selimis, Sven Goossens, Roel Maes, Kolin Paul
Early RTL Analysis for SCA Vulnerability in Fuzzy Extractors of Memory-Based PUF Enabled Devices. CoRR (2020)
Felipe Augusto da Silva, Ahmet Cagri Bagbaba, Annachiara Ruospo, Riccardo Mariani, Ghani Kanawati, Ernesto Sánchez, Matteo Sonza Reorda, Maksim Jenihhin, Said Hamdioui, Christian Sauer
Special Session: AutoSoC - A Suite of Open-Source Automotive SoC Benchmarks. VTS (2020)
Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendörfer, Christian Sauer, Anton Klotz, Michael Hübner, Jörg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka
RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems. DATE (2020)
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Maksim Jenihhin
Composing Graph Theory and Deep Neural Networks to Evaluate SEU Type Soft Error Effects. MECO (2020)
Guilherme Cardoso Medeiros, Cemil Cem Gürsoy, Lizhou Wu, Moritz Fieback, Maksim Jenihhin, Mottaqiallah Taouil, Said Hamdioui
A DFT Scheme to Improve Coverage of Hard-to-Detect Faults in FinFET SRAMs. DATE (2020)
Xinhui Lai, Maksim Jenihhin, Georgios N. Selimis, Sven Goossens, Roel Maes, Kolin Paul
Early RTL Analysis for SCA Vulnerability in Fuzzy Extractors of Memory-Based PUF Enabled Devices. VLSI-SOC (2020)
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik
Implementation-Independent Functional Test for Transition Delay Faults in Microprocessors. DSD (2020)
Ahmet Cagri Bagbaba, Maksim Jenihhin, Raimund Ubar, Christian Sauer
Representing Gate-Level SET Faults by Multiple SEU Faults at RTL. IOLTS (2020)
Ahmet Cagri Bagbaba, Maksim Jenihhin, Jaan Raik, Christian Sauer
Accelerating Transient Fault Injection Campaigns by using Dynamic HDL Slicing. CoRR (2020)
Ahmet Cagri Bagbaba, Maksim Jenihhin, Jaan Raik, Christian Sauer
Efficient Fault Injection based on Dynamic HDL Slicing Technique. IOLTS (2019)
Lembit Jürimägi, Raimund Ubar, Maksim Jenihhin, Jaan Raik, Sergei Devadze, Adeboye Stephen Oyeniran
Application Specific True Critical Paths Identification in Sequential Circuits. IOLTS (2019)
Maksim Jenihhin, Matteo Sonza Reorda, Aneesh Balakrishnan, Dan Alexandrescu
Challenges of Reliability Assessment and Enhancement in Autonomous Systems. DFT (2019)
Maksim Jenihhin, Xinhui Lai, Tara Ghasempouri, Jaan Raik
Towards Multidimensional Verification: Where Functional Meets Non-Functional. CoRR (2019)
Maksim Jenihhin, Matteo Sonza Reorda, Aneesh Balakrishnan, Dan Alexandrescu
Challenges of Reliability Assessment and Enhancement in Autonomous Systems. CoRR (2019)
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik
On Test Generation for Microprocessors for Extended Class of Functional Faults. VLSI-SoC (Selected Papers) (2019)
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Maksim Jenihhin
The Validation of Graph Model-Based, Gate Level Low-Dimensional Feature Data for Machine Learning Applications. NORCAS (2019)
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Gürsoy, Jaan Raik
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors. CoRR (2019)
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik
Implementation-Independent Functional Test Generation for MSC Microprocessors. VLSI-SoC (2019)
Xinhui Lai, Aneesh Balakrishnan, Thomas Lange, Maksim Jenihhin, Tara Ghasempouri, Jaan Raik, Dan Alexandrescu
Understanding multidimensional verification: Where functional meets non-functional. Microprocess. Microsystems 71 (2019)
Ahmet Cagri Bagbaba, Maksim Jenihhin, Jaan Raik, Christian Sauer
Accelerating Transient Fault Injection Campaigns by using Dynamic HDL Slicing. NORCAS (2019)
Aleksa Damljanovic, Giovanni Squillero, Cemil Cem Gürsoy, Maksim Jenihhin
On NBTI-induced Aging Analysis in IEEE 1687 Reconfigurable Scan Networks. VLSI-SoC (2019)
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Gürsoy, Jaan Raik
High-Level Combined Deterministic and Pseudo-exhuastive Test Generation for RISC Processors. ETS (2019)
Xinhui Lai, Maksim Jenihhin, Jaan Raik, Kolin Paul
PASCAL: Timing SCA Resistant Design and Verification Flow. IOLTS (2019)
Daniel H. P. Kraak, Cemil Cem Gürsoy, Innocent O. Agbo, Mottaqiallah Taouil, Maksim Jenihhin, Jaan Raik, Said Hamdioui
Software-Based Mitigation for Memory Address Decoder Aging. LATS (2019)
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Maksim Jenihhin
Modeling Gate-Level Abstraction Hierarchy Using Graph Convolutional Neural Networks to Predict Functional De-Rating Factors. AHS (2019)
Cemil Cem Gürsoy, Maksim Jenihhin, Adeboye Stephen Oyeniran, Davide Piumatti, Jaan Raik, Matteo Sonza Reorda, Raimund Ubar
New categories of Safe Faults in a processor-based Embedded System. DDECS (2019)
Saba Yousefzadeh, Katayoon Basharkhah, Nooshin Nosrati, Rezgar Sadeghi, Jaan Raik, Maksim Jenihhin, Zainalabedin Navabi
An Accelerator-based Architecture Utilizing an Efficient Memory Link for Modern Computational Requirements. EWDTS (2019)
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Gürsoy, Jaan Raik
Mixed-level identification of fault redundancy in microprocessors. CoRR (2019)
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Gürsoy, Jaan Raik
Mixed-level identification of fault redundancy in microprocessors. LATS (2019)
Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendörfer, Christian Sauer, Anton Klotz, Michael Hübner, Jörg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka
RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems. CoRR (2019)
Raimund Ubar, Lembit Jürimägi, Adeniyi Olanrewaju Adekoya, Maksim Jenihhin
True Path Tracing in Structurally Synthesized BDDs for Testability Analysis of Digital Circuits. DSD (2019)
Syed Rameez Naqvi, Anjum Zahid, Lina Sawalha, Syed Saud Naqvi, Tallha Akram, Sajjad Ali Haider, Kumar Yelamarthi, Maksim Jenihhin
An optimization framework for dynamic pipeline management in computing systems. Comput. Electr. Eng. 78 (2019)
Lembit Jurimagi, Raimund Ubar, Maksim Jenihhin, Jaan Raik, Sergei Devadze, Sergei Kostin
Hierarchical Timing-Critical Paths Analysis in Sequential Circuits. PATMOS (2018)
Raimund Ubar, Sergei Kostin, Maksim Jenihhin, Jaan Raik, Lembit Jürimägi
Fast identification of true critical paths in sequential circuits. Microelectron. Reliab. 81 (2018)
Karl Janson, Carl Johann Treudler, Thomas Hollstein, Jaan Raik, Maksim Jenihhin, Görschwin Fey
Software-Level TMR Approach for On-Board Data Processing in Space Applications. DDECS (2018)
Maksim Jenihhin, Xinhui Lai, Tara Ghasempouri, Jaan Raik
Towards Multidimensional Verification: Where Functional Meets Non-Functional. NORCAS (2018)
Raimund Ubar, Lembit Jurimagi, Maksim Jenihhin, Jaan Raik, Niyi-Leigh Olugbenga, Vladimir Viies
Timing-critical path analysis with structurally synthesized BDDs. MECO (2018)
Serhiy Avramenko, Siavoosh Payandeh Azad, Stefano Esposito, Behrad Niazmand, Massimo Violante, Jaan Raik, Maksim Jenihhin
QoSinNoC: Analysis of QoS-Aware NoC Architectures for Mixed-Criticality Applications. DDECS (2018)
Heinrich Theodor Vierhaus, Maksim Jenihhin, Matteo Sonza Reorda
RESCUE: Cross-Sectoral PhD Training Concept for Interdependent Reliability, Security and Quality. EWME (2018)
Serhiy Avramenko, Siavoosh Payandeh Azad, Behrad Niazmand, Massimo Violante, Jaan Raik, Maksim Jenihhin
Upgrading QoSinNoC: Efficient Routing for Mixed-Criticality Applications and Power Analysis. VLSI-SoC (2018)
Artur Jutman, Christophe Lotz, Erik Larsson, Matteo Sonza Reorda, Maksim Jenihhin, Jaan Raik, Hans G. Kerkhoff, Rene Krenz-Baath, Piet Engelke
BASTION: Board and SoC test instrumentation for ageing and no failure found. DATE (2017)
Raimund Ubar, Sergei Kostin, Maksim Jenihhin, Jaan Raik
A scalable technique to identify true critical paths in sequential circuits. DDECS (2017)
Jüri Vain, Leonidas Tsiopoulos, Vyacheslav S. Kharchenko, Apneet Kaur, Maksim Jenihhin, Jaan Raik
Multi-Fragment Markov Model Guided Online Test Generation for MPSoC. ICTERI (2017)

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Publication Activity (10 Years)

Top Topics

Top Venues

Maksim Jenihhin