Dan Alexandrescu

Publication Activity (10 Years)

Years Active: 2000-2023
Publications (10 Years): 30

Top Topics

Fault Tolerance

Machine Learning

Top Venues

Publications

Fei Su, Meirav Nitzan, Ankush Sethi, Vaibhav Kumar, Dan Alexandrescu
Innovation Practices Track: VLSI Functional Safety. VTS (2023)
Aneesh Balakrishnan, Guilherme Cardoso Medeiros, Cemil Cem Gürsoy, Said Hamdioui, Maksim Jenihhin, Dan Alexandrescu
Modeling Soft-Error Reliability Under Variability. DFT (2021)
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Maksim Jenihhin
Composing Graph Theory and Deep Neural Networks to Evaluate SEU Type Soft Error Effects. CoRR (2021)
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Maksim Jenihhin
Modeling Gate-Level Abstraction Hierarchy Using Graph Convolutional Neural Networks to Predict Functional De-Rating Factors. CoRR (2021)
Aneesh Balakrishnan, Dan Alexandrescu, Maksim Jenihhin, Thomas Lange, Maximilien Glorieux
Gate-Level Graph Representation Learning: A Step Towards the Improved Stuck-at Faults Analysis. ISQED (2021)
Dan Alexandrescu, Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux
Enabling Cross-Layer Reliability and Functional Safety Assessment Through ML-Based Compact Models. CoRR (2021)
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Maksim Jenihhin
The Validation of Graph Model-Based, Gate Level Low-Dimensional Feature Data for Machine Learning Applications. CoRR (2021)
Xinhui Lai, Thomas Lange, Aneesh Balakrishnan, Dan Alexandrescu, Maksim Jenihhin
On Antagonism Between Side-Channel Security and Soft-Error Reliability in BNN Inference Engines. VLSI-SoC (2021)
Thomas Lange, Aneesh Balakrishnan, Maximilien Glorieux, Dan Alexandrescu, Luca Sterpone
Machine Learning to Tackle the Challenges of Transient and Soft Errors in Complex Circuits. CoRR (2020)
Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Luca Sterpone
Functional Failure Rate Due to Single-Event Transients in Clock Distribution Networks. CoRR (2020)
Dan Alexandrescu, Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux
Enabling Cross-Layer Reliability and Functional Safety Assessment Through ML-Based Compact Models. IOLTS (2020)
Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendörfer, Christian Sauer, Anton Klotz, Michael Hübner, Jörg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka
RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems. DATE (2020)
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Maksim Jenihhin
Composing Graph Theory and Deep Neural Networks to Evaluate SEU Type Soft Error Effects. MECO (2020)
Thomas Lange, Aneesh Balakrishnan, Maximilien Glorieux, Dan Alexandrescu, Luca Sterpone
Machine Learning Clustering Techniques for Selective Mitigation of Critical Design Features. CoRR (2020)
Thomas Lange, Aneesh Balakrishnan, Maximilien Glorieux, Dan Alexandrescu, Luca Sterpone
On the Estimation of Complex Circuits Functional Failure Rate by Machine Learning Techniques. CoRR (2020)
Thomas Lange, Aneesh Balakrishnan, Maximilien Glorieux, Dan Alexandrescu, Luca Sterpone
Machine Learning Clustering Techniques for Selective Mitigation of Critical Design Features. IOLTS (2020)
Maksim Jenihhin, Matteo Sonza Reorda, Aneesh Balakrishnan, Dan Alexandrescu
Challenges of Reliability Assessment and Enhancement in Autonomous Systems. DFT (2019)
Maksim Jenihhin, Matteo Sonza Reorda, Aneesh Balakrishnan, Dan Alexandrescu
Challenges of Reliability Assessment and Enhancement in Autonomous Systems. CoRR (2019)
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Maksim Jenihhin
The Validation of Graph Model-Based, Gate Level Low-Dimensional Feature Data for Machine Learning Applications. NORCAS (2019)
Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Luca Sterpone
Functional Failure Rate Due to Single-Event Transients in Clock Distribution Networks. DTIS (2019)
Xinhui Lai, Aneesh Balakrishnan, Thomas Lange, Maksim Jenihhin, Tara Ghasempouri, Jaan Raik, Dan Alexandrescu
Understanding multidimensional verification: Where functional meets non-functional. Microprocess. Microsystems 71 (2019)
Thomas Lange, Aneesh Balakrishnan, Maximilien Glorieux, Dan Alexandrescu, Luca Sterpone
Machine Learning to Tackle the Challenges of Transient and Soft Errors in Complex Circuits. IOLTS (2019)
Aneesh Balakrishnan, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Maksim Jenihhin
Modeling Gate-Level Abstraction Hierarchy Using Graph Convolutional Neural Networks to Predict Functional De-Rating Factors. AHS (2019)
Thomas Lange, Aneesh Balakrishnan, Maximilien Glorieux, Dan Alexandrescu, Luca Sterpone
On the Estimation of Complex Circuits Functional Failure Rate by Machine Learning Techniques. DSN (Supplements) (2019)
Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendörfer, Christian Sauer, Anton Klotz, Michael Hübner, Jörg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka
RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems. CoRR (2019)
Muhammed Ceylan Morgül, Onur Tunali, Mustafa Altun, Luca Frontini, Valentina Ciriani, Elena Ioana Vatajelu, Lorena Anghel, Csaba Andras Moritz, Mircea R. Stan, Dan Alexandrescu
Integrated Synthesis Methodology for Crossbar Arrays. NANOARCH (2018)
Luca Sterpone, Sarah Azimi, Ludovica Bozzoli, Boyang Du, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Cesar Boatella Polo, David Merodio Codinachs
A Novel Error Rate Estimation Approach forUltraScale+ SRAM-based FPGAs. AHS (2018)
Dan Alexandrescu, Adrian Evans, Maximilien Glorieux, Issam Nofal
EDA support for functional safety - How static and dynamic failure analysis can improve productivity in the assessment of functional safety. IOLTS (2017)
Dan Alexandrescu, Mustafa Altun, Lorena Anghel, Anna Bernasconi, Valentina Ciriani, Luca Frontini, Mehdi Baradaran Tahoori
Logic synthesis and testing techniques for switching nano-crossbar arrays. Microprocess. Microsystems 54 (2017)
Dan Alexandrescu, Mustafa Altun, Lorena Anghel, Anna Bernasconi, Valentina Ciriani, Luca Frontini, Mehdi Baradaran Tahoori
Synthesis and Performance Optimization of a Switching Nano-Crossbar Computer. DSD (2016)
Dan Alexandrescu, Adrian Evans, Enrico Costenaro, Maximilien Glorieux
A call for cross-layer and cross-domain reliability analysis and management. IOLTS (2015)
Adrian Evans, Dan Alexandrescu, Veronique Ferlet-Cavrois, Kay-Obbe Voss
Techniques for heavy ion microbeam analysis of FPGA SER sensitivty. IRPS (2015)
Jacob A. Abraham, Ravishankar K. Iyer, Dimitris Gizopoulos, Dan Alexandrescu, Yervant Zorian
The future of fault tolerant computing. IOLTS (2015)
Mojtaba Ebrahimi, Adrian Evans, Mehdi Baradaran Tahoori, Enrico Costenaro, Dan Alexandrescu, Vikas Chandra, Razi Seyyedi
Comprehensive Analysis of Sequential and Combinational Soft Errors in an Embedded Processor. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (10) (2015)
Dan Alexandrescu, Nematollah Bidokhti, Andy Yu, Adrian Evans, Enrico Costenaro
Managing SER costs of complex systems through Linear Programming. IOLTS (2014)
Dan Alexandrescu, Luca Sterpone, Celia López-Ongil
Fault injection and fault tolerance methodologies for assessing device robustness and mitigating against ionizing radiation. ETS (2014)
Shrikanth Ganapathy, Ramon Canal, Dan Alexandrescu, Enrico Costenaro, Antonio González, Antonio Rubio
INFORMER: An integrated framework for early-stage memory robustness analysis. DATE (2014)
Hao Xie, Li Chen, Rui Liu, Adrian Evans, Dan Alexandrescu, Shi-Jie Wen, Rick Wong
New approaches for synthesis of redundant combinatorial logic for selective fault tolerance. IOLTS (2014)
Andreas Steininger, Varadan Savulimedu Veeravalli, Dan Alexandrescu, Enrico Costenaro, Lorena Anghel
Exploring the state dependent SET sensitivity of asynchronous logic - The muller-pipeline example. ICCD (2014)
Mojtaba Ebrahimi, Adrian Evans, Mehdi Baradaran Tahoori, Razi Seyyedi, Enrico Costenaro, Dan Alexandrescu
Comprehensive analysis of alpha and neutron particle-induced soft errors in an embedded processor at nanoscales. DATE (2014)
Adrian Evans, Dan Alexandrescu, Enrico Costenaro, Liang Chen
Hierarchical RTL-based combinatorial SER estimation. IOLTS (2013)
Dan Alexandrescu, Enrico Costenaro, Adrian Evans
State-aware single event analysis for sequential logic. IOLTS (2013)
Alireza Rohani, Hans G. Kerkhoff, Enrico Costenaro, Dan Alexandrescu
Pulse-length determination techniques in the rectangular single event transient fault model. ICSAMOS (2013)
Enrico Costenaro, Dan Alexandrescu, Kader Belhaddad, Michael Nicolaidis
A Practical Approach to Single Event Transient Analysis for Highly Complex Design. J. Electron. Test. 29 (3) (2013)
Dan Alexandrescu, Enrico Costenaro
Towards optimized functional evaluation of SEE-induced failures in complex designs. IOLTS (2012)
Adrian Evans, Michael Nicolaidis, Shi-Jie Wen, Dan Alexandrescu, Enrico Costenaro
RIIF - Reliability information interchange format. IOLTS (2012)
Cécile Weulersse, Florent Miller, Dan Alexandrescu, Erwin Schaefer, Olivier Crépel, Rémi Gaillard
Test methodology of a new upset mechanism induced by protons in deep sub-micron devices. Microelectron. Reliab. 52 (9-10) (2012)
Shrikanth Ganapathy, Ramon Canal, Dan Alexandrescu, Enrico Costenaro, Antonio González, Antonio Rubio
A novel variation-tolerant 4T-DRAM cell with enhanced soft-error tolerance. ICCD (2012)
Miguel Vilchis, Ramnath Venkatraman, Enrico Costenaro, Dan Alexandrescu
A real-case application of a synergetic design-flow-oriented SER analysis. IOLTS (2012)
Dan Alexandrescu
A comprehensive soft error analysis methodology for SoCs/ASICs memory instances. IOLTS (2011)
Enrico Costenaro, Massimo Violante, Dan Alexandrescu
A new IP core for fast error detection and fault tolerance in COTS-based solid state mass memories. IOLTS (2011)
Dan Alexandrescu, Enrico Costenaro, Michael Nicolaidis
A Practical Approach to Single Event Transients Analysis for Highly Complex Designs. DFT (2011)
Mehdi Baradaran Tahoori, Ishwar Parulkar, Dan Alexandrescu, Kevin Granlund, Allan Silburt, Bapi Vinnakota
Panel: Reliability of data centers: Hardware vs. software. DATE (2010)
Dan Alexandrescu, Anne-Lise Lhomme-Perrot, Erwin Schäfer, Cyrille Beltrando
Highs and lows of radiation testing. IOLTS (2009)
Michael Nicolaidis, Renaud Perez, Dan Alexandrescu
Low-Cost Highly-Robust Hardened Cells Using Blocking Feedback Transistors. VTS (2008)
Shi-Jie Wen, Dan Alexandrescu, Renaud Perez
A Systematical Method of Quantifying SEU FIT. IOLTS (2008)
Dan Alexandrescu, Lorena Anghel, Michael Nicolaidis
Simulating Single Event Transients in VDSM ICs for Ground Level Radiation. J. Electron. Test. 20 (4) (2004)
Dan Alexandrescu, Lorena Anghel, Michael Nicolaidis
Simulating Single Event Transients in VDSM ICs for Ground Level Radiation. LATW (2002)
Dan Alexandrescu, Lorena Anghel, Michael Nicolaidis
New Methods for Evaluating the Impact of Single Event Transients in VDSM ICs. DFT (2002)
Lorena Anghel, Dan Alexandrescu, Michael Nicolaidis
Evaluation of a Soft Error Tolerance Technique Based on Time and/or Space Redundancy. SBCCI (2000)