Massimo Violante

ORCID

Publication Activity (10 Years)

Years Active: 1997-2024
Publications (10 Years): 40

Top Venues

Publications

Mohammadreza Amel Solouki, Shaahin Angizi, Massimo Violante
Dependability in Embedded Systems: A Survey of Fault Tolerance Methods and Software-Based Mitigation Techniques. CoRR (2024)
Pietro d'Agostino, Massimo Violante, Gianpaolo Macario
A user-extensible solution for deploying fog computing in industrial applications. ISIE (2023)
Jacopo Sini, Luigi Pugliese, Sara Groppo, Michele Guagnano, Massimo Violante
Towards In-Cabin Monitoring: A Preliminary Study on Sensors Data Collection and Analysis. CoRR (2023)
Luigi Pugliese, Michele Guagnano, Sara Groppo, Massimo Violante, Riccardo Groppo
Rule-based Sleep-Apnea detection algorithm. IWASI (2023)
Jacopo Sini, Mohammadreza Amel Solouki, Massimo Violante
Guidelines for Implementing Control Flow Checking into Automotive Embedded Applications Developed with C Language. NorCAS (2023)
Mohammadreza Amel Solouki, Jacopo Sini, Massimo Violante
An Experimental Evaluation of Control Flow Checking for Automotive Embedded Applications Compliant With ISO 26262. IEEE Access 11 (2023)
Francesco Cosimi, Jacopo Sini, Antonio Arena, Massimo Violante
Novel Control Flow Checking Implementations for Automotive Software. SMACD (2023)
Mohammadreza Amel Solouki, Jacopo Sini, Massimo Violante
A New Approach to Selectively Control Flow Checking Methods Compliant with ISO 26262. CF (2023)
Pietro d'Agostino, Massimo Violante, Gianpaolo Macario
An Embedded Low-Cost Solution for a Fog Computing Device on the Internet of Things. FMEC (2023)
Antonio Costantino Marceddu, Luigi Pugliese, Jacopo Sini, Gustavo Ramirez Espinosa, Mohammadreza Amel Solouki, Pietro Chiavassa, Edoardo Giusto, Bartolomeo Montrucchio, Massimo Violante, Francesco De Pace
A Novel Redundant Validation IoT System for Affective Learning Based on Facial Expressions and Biological Signals. Sensors 22 (7) (2022)
Mohammadreza Amel Solouki, Jacopo Sini, Massimo Violante
Effectiveness of Control Flow Checking Algorithms Using a Model-Based Software Design Approach: An Empirical Study. ICECS 2022 (2022)
Jacopo Sini, Andrea Passarino, Stefano Bonicelli, Massimo Violante
A Simulation-Based Approach to Aid Development of Software-Based Hardware Failure Detection and Mitigation Algorithms of a Mobile Robot System. Sensors 22 (13) (2022)
Luigi Pugliese, Massimo Violante, Sara Groppo
A Novel Algorithm for Detecting the Drowsiness Onset in Real-Time. IEEE Access 10 (2022)
Antonio Costantino Marceddu, Jacopo Sini, Bartolomeo Montrucchio, Massimo Violante
Use of Facial Expressions to Improve the Social Acceptance of Level 4 and 5 Automated Driving System Equipped Vehicles. SoftCOM (2022)
Jacopo Sini, M. D'Auria, Massimo Violante
Towards Vehicle-Level Simulator Aided Failure Mode, Effect, and Diagnostic Analysis of Automotive Power Electronics Items. LATS (2020)
Serhiy Avramenko, Massimo Violante
RTOS Solution for NoC-Based COTS MPSoC Usage in Mixed-Criticality Systems. J. Electron. Test. 35 (1) (2019)
Jacopo Sini, Massimo Violante, V. Dodde, R. Gnaniah, L. Pecorella
A Novel Simulation-Based Approach for ISO 26262 Hazard Analysis and Risk Assessment. IOLTS (2019)
Stefano Esposito, Jacopo Sini, Massimo Violante
Real-time validation of mixed-criticality applications. LATS (2018)
Jacopo Sini, A. Mugoni, Massimo Violante, A. Quario, C. Argiri, F. Fusetti
An automatic approach to integration testing for critical automotive software. DTIS (2018)
Jacopo Sini, Matteo Sonza Reorda, Massimo Violante, Peter Sarson
Towards an automatic approach for hardware verification according to ISO 26262 functional safety standard. IOLTS (2018)
Stefano Esposito, Serhiy Avramenko, Massimo Violante
Efficient Software-Based Partitioning for Commercial-off-the-Shelf NoC-based MPSoCs for Mixed-Criticality Systems. IOLTS (2018)
Stefano Esposito, Jacopo Sini, Massimo Violante
Real-Time Validation of Fault-Tolerant Mixed-Criticality Systems. IOLTS (2018)
Jacopo Sini, Massimo Violante, Riccardo Dessì
Computer-Aided Design of Multi-Agent Cyber-Physical Systems. ETFA (2018)
Serhiy Avramenko, Siavoosh Payandeh Azad, Stefano Esposito, Behrad Niazmand, Massimo Violante, Jaan Raik, Maksim Jenihhin
QoSinNoC: Analysis of QoS-Aware NoC Architectures for Mixed-Criticality Applications. DDECS (2018)
Jacopo Sini, Massimo Violante
An Automatic Approach to Perform FMEDA Safety Assessment on Hardware Designs. IOLTS (2018)
Stefano Esposito, Serhiy Avramenko, Massimo Violante
RTOS for mixed criticality applications deployed on NoC-based COTS MPSoC. LATS (2018)
Wim Dobbelaere, On Semi, Massimo Violante, Turin Polytechnic, Jeff Rearick
Innovative practices on quality levels of A/MS devices. VTS (2018)
Serhiy Avramenko, Siavoosh Payandeh Azad, Behrad Niazmand, Massimo Violante, Jaan Raik, Maksim Jenihhin
Upgrading QoSinNoC: Efficient Routing for Mixed-Criticality Applications and Power Analysis. VLSI-SoC (2018)
Jacopo Sini, Antonio Costantino Marceddu, Massimo Violante, Riccardo Dessì
Passengers' Emotions Recognition to Improve Social Acceptance of Autonomous Driving Vehicles. IIH-MSP (1) (2017)
Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Görschwin Fey
A High-Level Approach to Analyze the Effects of Soft Errors on Lossless Compression Algorithms. J. Electron. Test. 33 (1) (2017)
Stefano Esposito, Massimo Violante
On the Consolidation of Mixed Criticalities Applications on Multicore Architectures. J. Electron. Test. 33 (1) (2017)
Stefano Esposito, Massimo Violante, Marco Sozzi, Marco Terrone, Massimo Traversone
A Novel Method for Online Detection of Faults Affecting Execution-Time in Multicore-Based Systems. ACM Trans. Embed. Comput. Syst. 16 (4) (2017)
Tino Flenker, Jan Malburg, Görschwin Fey, Serhiy Avramenko, Massimo Violante, Matteo Sonza Reorda
Towards Making Fault Injection on Abstract Models a More Accurate Tool for Predicting RT-Level Effects. ISVLSI (2017)
Enea Bagalini, Jacopo Sini, Matteo Sonza Reorda, Massimo Violante, H. Klimesch, Peter Sarson
An automatic approach to perform the verification of hardware designs according to the ISO26262 functional safety standard. LATS (2017)
Stefano Esposito, Massimo Violante
Deterministic network on chip for deploying real time applications on many-core processors. IOLTS (2017)
Stefano Esposito, Serhiy Avramenko, Massimo Violante
On the consolidation of mixed criticalities applications on multicore architectures. LATS (2016)
Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Görschwin Fey, Jan-Gerd Mess, Robert Schmidt
On the robustness of DCT-based compression algorithms for space applications. IOLTS (2016)
Stefano Esposito, Massimo Violante, Marco Sozzi, Marco Terrone, Massimo Traversone
Online time interference detection in mixed-criticality applications on multicore architectures using performance counters. IOLTS (2016)
Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Görschwin Fey
Analysis of the effects of soft errors on compression algorithms through fault injection inside program variables. LATS (2016)
Paolo Gai, Massimo Violante
Automotive embedded software architecture in the multi-core age. ETS (2016)
Enea Bagalini, Massimo Violante, H. Hakobyan
Evaluation of error effects on a biomedical system. EWDTS (2015)
Enea Bagalini, Massimo Violante
Designing Autonomous Race Car Models for Learning Advanced Topics in Hard Real-Time System. Int. J. Robotics Appl. Technol. 3 (1) (2015)
Serhiy Avramenko, Stefano Esposito, Massimo Violante, Marco Sozzi, Massimo Traversone, Marco Binello, Marco Terrone
An Hybrid Architecture for consolidating mixed criticality applications on multicore systems. IOLTS (2015)
Hakob Hakobyan, Paolo Rech, Matteo Sonza Reorda, Massimo Violante
Early reliability evaluation of a biomédical system. IDT (2014)
Nikos Andrikos, Massimo Violante, David Merodio Codinachs
A fully-automated flow for ITAR-free rad-hard Atmel FPGAs. IOLTS (2013)
Prashant D. Joshi, Massimo Violante
Guest Editorial. J. Electron. Test. 29 (3) (2013)
Khaled Benkrid, Didier Keymeulen, David Merodio, Michael Newell, Rainer Wansch, Umeshkumar D. Patel, Ahmet T. Erdogan, Niels Hadaschik, Luca Sterpone, Jelle Poupaert, Massimo Violante
Preface. AHS (2013)
Ahmad Din, Basilio Bona, Joel Morrissette, Moazzam Hussain, Massimo Violante, M. Fawad Naseem
Embedded Low Power Controller for Autonomous Landing of UAV Using Artificial Neural Network. FIT (2012)
Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, Cecilia Metra, Martin Omaña, Daniele Rossi, Matteo Sonza Reorda, Luca Sterpone, Massimo Violante, Simone Gerardin, M. Bagatin, Alessandro Paccagnella
High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies. DFT (2012)
Salvatore Campagna, Massimo Violante
An hybrid architecture to detect transient faults in microprocessors: An experimental validation. DATE (2012)
Hipólito Guzmán-Miranda, Luca Sterpone, Massimo Violante, Miguel A. Aguirre, Manuel Gutiérrez-Rizo
Coping With the Obsolescence of Safety- or Mission-Critical Embedded Systems Using FPGAs. IEEE Trans. Ind. Electron. 58 (3) (2011)
Massimo Violante, Cristina Meinhardt, Ricardo Reis, Matteo Sonza Reorda
A Low-Cost Solution for Deploying Processor Cores in Harsh Environments. IEEE Trans. Ind. Electron. 58 (7) (2011)
Salvatore Campagna, Moazzam Hussain, Massimo Violante
A Light-Weight Fault Tolerance Framework for Space Computing using COTS Components. ARCS Workshops (2011)
Enrico Costenaro, Massimo Violante, Dan Alexandrescu
A new IP core for fast error detection and fault tolerance in COTS-based solid state mass memories. IOLTS (2011)
Salvatore Campagna, Moazzam Hussain, Massimo Violante
Hypervisor-Based Virtual Hardware for Fault Tolerance in COTS Processors Targeting Space Applications. DFT (2010)
Salvatore Campagna, Massimo Violante
A framework to support the design of COTS-based reliable space computers for on-board data handling. IOLTS (2010)
Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Niccolò Battezzati, Luca Sterpone, Massimo Violante
An integrated flow for the design of hardened circuits on SRAM-based FPGAs. ETS (2010)
Niccolò Battezzati, Luca Sterpone, Massimo Violante, Filomena Decuzzi
A new software tool for static analysis of SET sensitiveness in Flash-based FPGAs. VLSI-SoC (2010)
Niccolò Battezzati, Davide Serrone, Massimo Violante
A new framework for the automatic insertion of mitigation structures in circuits netlists. IOLTS (2010)
Gianpiero Cabodi, Marco Murciano, Massimo Violante
Boosting software fault injection for dependability analysis of real-time embedded applications. ACM Trans. Embed. Comput. Syst. 10 (2) (2010)
Massimo Violante, M. L. Esposti
A low-cost solution for developing reliable Linux-based space computers for on-board data handling. IOLTS (2009)
Francesco Abate, Luca Sterpone, Massimo Violante, Fernanda Lima Kastensmidt
A study of the Single Event Effects impact on functional mapping within Flash-based FPGAs. DATE (2009)
Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis
A low-cost SEE mitigation solution for soft-processors embedded in Systems on Pogrammable Chips. DATE (2009)
Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis
An On-board Data-Handling Computer for Deep-Space Exploration Built Using Commercial-Off-the-Shelf SRAM-Based FPGAs. DFT (2009)
Niccolò Battezzati, Filomena Decuzzi, Luca Sterpone, Massimo Violante
Soft errors in Flash-based FPGAs: Analysis methodologies and first results. FPL (2009)
Gianpaolo Macario, Marco Torchiano, Massimo Violante
An in-vehicle infotainment software architecture based on google android. SIES (2009)
Cristina Meinhardt, Ricardo Reis, Massimo Violante, Matteo Sonza Reorda
Recovery scheme for hardening system on programmable chips. LATW (2009)
Niccolò Battezzati, Filomena Decuzzi, Massimo Violante, Michel Briet
Application-oriented SEU sensitiveness analysis of Atmel rad-hard FPGAs. IOLTS (2009)
Niccolò Battezzati, Simone Gerardin, Andrea Manuzzato, Alessandro Paccagnella, Sana Rezgui, Luca Sterpone, Massimo Violante
On the Evaluation of Radiation-Induced Transient Faults in Flash-Based FPGAs. IOLTS (2008)
Cristiana Bolchini, Antonio Miele, Fabio Rebaudengo, Fabio Salice, Donatella Sciuto, Luca Sterpone, Massimo Violante
Software and Hardware Techniques for SEU Detection in IP Processors. J. Electron. Test. 24 (1-3) (2008)
Francesco Abate, Massimo Violante
Coping with Obsolescence of Processor Cores in Critical Applications. DFT (2008)
Luca Sterpone, Niccolò Battezzati, Massimo Violante
A new placement algorithm for the optimization of fault tolerant circuits on reconfigurable devices. WREFT@CF (2008)
Eduardo Luis Rhod, Carlos Arthur Lang Lisbôa, Luigi Carro, Matteo Sonza Reorda, Massimo Violante
Hardware and Software Transparency in the Protection of Programs Against SEUs and SETs. J. Electron. Test. 24 (1-3) (2008)
Luca Sterpone, Massimo Violante
A new decompression system for the configuration process of SRAM-based FPGAS. ACM Great Lakes Symposium on VLSI (2007)
Luca Sterpone, Matteo Sonza Reorda, Massimo Violante, Fernanda Lima Kastensmidt, Luigi Carro
Evaluating Different Solutions to Design Fault Tolerant Systems with SRAM-based FPGAs. J. Electron. Test. 23 (1) (2007)
Luca Sterpone, Massimo Violante
Static and Dynamic Analysis of SEU Effects in SRAM-Based FPGAs. ETS (2007)
Luca Sterpone, Massimo Violante
A new hardware architecture for performing the gridding of DNA microarray images. ACM Great Lakes Symposium on VLSI (2007)
Salvatore Pontarelli, Luca Sterpone, Gian Carlo Cardarilli, Marco Re, Matteo Sonza Reorda, Adelio Salsano, Massimo Violante
Self Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders. IOLTS (2007)
Marco Murciano, Massimo Violante
Validating the dependability of embedded systems through fault injection by means of loadable kernel modules. HLDVT (2007)
Salvatore Pontarelli, Luca Sterpone, Gian Carlo Cardarilli, Marco Re, Matteo Sonza Reorda, Adelio Salsano, Massimo Violante
Optimization of Self Checking FIR filters by means of Fault Injection Analysis. DFT (2007)
Andrea Manuzzato, Paolo Rech, Simone Gerardin, Alessandro Paccagnella, Luca Sterpone, Massimo Violante
Sensitivity Evaluation of TMR-Hardened Circuits to Multiple SEUs Induced by Alpha Particles in Commercial SRAM-Based FPGAs. DFT (2007)
Luca Sterpone, Massimo Violante
A New Reliability-Oriented Place and Route Algorithm for SRAM-Based FPGAs. IEEE Trans. Computers 55 (6) (2006)
Luca Sterpone, Massimo Violante
Dependability Evaluation of Transient Fault Effects in Reconfigurable Compute Fabric Devices. IOLTS (2006)
Paolo Bernardi, Letícia Maria Veiras Bolzani, Alberto Manzone, Massimo Osella, Massimo Violante, Matteo Sonza Reorda
Software-Based On-Line Test of Communication Peripherals in Processor-Based Systems for Automotive Applications. MTV (2006)
Julio Pérez Acle, Matteo Sonza Reorda, Massimo Violante
Early, Accurate Dependability Analysis of CAN-Based Networked Systems. IEEE Des. Test Comput. 23 (1) (2006)
Luca Sterpone, Massimo Violante
Hardening FPGA-based Systems Against SEUs: A New Design Methodology. J. Comput. 1 (1) (2006)
Massimiliano Schillaci, Matteo Sonza Reorda, Massimo Violante
A New Approach to Cope with Single Event Upsets in Processor-based Systems. LATW (2006)
Matteo Sonza Reorda, Luca Sterpone, Massimo Violante, Marta Portela-García, Celia López-Ongil, Luis Entrena
Fault Injection-based Reliability Evaluation of SoPCs. ETS (2006)
Paolo Bernardi, Letícia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante
A New Hybrid Fault Detection Technique for Systems-on-a-Chip. IEEE Trans. Computers 55 (2) (2006)
Maurizio Rebaudengo, Luca Sterpone, Massimo Violante, Cristiana Bolchini, Antonio Miele, Donatella Sciuto
Combined software and hardware techniques for the design of reliable IP processors. DFT (2006)
Maurizio Martina, Guido Masera, Andrea Molino, Fabrizio Vacca, Luca Sterpone, Massimo Violante
A new approach to compress the configuration information of programmable devices. DATE Designers' Forum (2006)
Luca Sterpone, Massimo Violante
ReCoM: A New Reconfigurable Compute Fabric Architecture for Computation-Intensive Applications. DDECS (2006)
Matteo Sonza Reorda, Massimo Violante
Hardware-in-the-Loop-Based Dependability Analysis of Automotive Systems. IOLTS (2006)
Marta Portela-García, Luca Sterpone, Matteo Sonza Reorda, Massimo Violante
A Fault Injection Environment for SoPC's Embedded Microprocessors. LATW (2006)
Carlos Arthur Lang Lisbôa, Luigi Carro, Matteo Sonza Reorda, Massimo Violante
Online hardening of programs against SEUs and SETs. DFT (2006)
Ernesto Sánchez, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero, Luca Sterpone, Massimo Violante
New evolutionary techniques for test-program generation for complex microprocessor cores. GECCO (2005)
Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
Automatic generation of test sets for SBST of microprocessor IP cores. SBCCI (2005)
Paolo Bernardi, Letícia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
An Integrated Approach for Increasing the Soft-Error Detection Capabilities in SoCs processors. DFT (2005)
Paolo Bernardi, Letícia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante
On-Line Detection of Control-Flow Errors in SoCs by Means of an Infrastructure IP Core. DSN (2005)
Luca Sterpone, Massimo Violante
A design flow for protecting FPGA-based systems against single event upsets. DFT (2005)

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Publication Activity (10 Years)

Top Topics

Top Venues

Massimo Violante