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An integrated flow for the design of hardened circuits on SRAM-based FPGAs.
Cristiana Bolchini
Antonio Miele
Chiara Sandionigi
Niccolò Battezzati
Luca Sterpone
Massimo Violante
Published in:
ETS (2010)
Keyphrases
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design process
engineering design
building blocks
design methodology
case study
image sequences
user interface
circuit design
cmos technology
fpga implementation
logic circuits
power reduction
high level synthesis