Martin Omaña

Publication Activity (10 Years)

Years Active: 2003-2022
Publications (10 Years): 15

Top Topics

Error Detection

Wireless Sensor

Defeasible Logic

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

J. Electron. Test.

IEEE Trans. Computers

Publications

Marco Grossi, Martin Omaña, Daniele Rossi, Biagio Marzulli, Cecilia Metra
Novel BTI Robust Ring-Oscillator-Based Physically Unclonable Function. IOLTS (2022)
Marco Grossi, Martin Omaña
Investigation of the Impact of BTI Aging Phenomenon on Analog Amplifiers. J. Electron. Test. 37 (4) (2021)
Martin Omaña, Alessandro Fiore, Marco Mongitore, Cecilia Metra
Fault-Tolerant Inverters for Reliable Photovoltaic Systems. IEEE Trans. Very Large Scale Integr. Syst. 27 (1) (2019)
Marco Grossi, Martin Omaña
Impact of Bias Temperature Instability (BTI) Aging Phenomenon on Clock Deskew Buffers. J. Electron. Test. 35 (2) (2019)
Marco Grossi, Annachiara Berardinelli, Edward Sazonov, Wesley Beccaro, Martin Omaña
Sensors and Embedded Systems in Agriculture and Food Analysis. J. Sensors 2019 (2019)
Martin Omaña, S. Govindaraj, Cecilia Metra
Low-Cost Strategy for Bus Propagation Delay Reduction. J. Electron. Test. 35 (2) (2019)
Martin Omaña, TusharaSandeep Edara, Cecilia Metra
Low-Cost Strategy to Mitigate the Impact of Aging on Latches' Robustness. IEEE Trans. Emerg. Top. Comput. 6 (4) (2018)
Martin Omaña, Marco Padovani, Kreshnik Veliu, Cecilia Metra, Juergen Alt, Rajesh Galivanche
New Approaches for Power Binning of High Performance Microprocessors. IEEE Trans. Computers 66 (7) (2017)
Martin Omaña, Daniele Rossi, Filippo Fuzzi, Cecilia Metra, Chandra Tirumurti, Rajesh Galivanche
Scalable Approach for Power Droop Reduction During Scan-Based Logic BIST. IEEE Trans. Very Large Scale Integr. Syst. 25 (1) (2017)
Martin Omaña, A. Fiore, Cecilia Metra
Inverters' self-checking monitors for reliable photovoltaic systems. DATE (2016)
Martin Omaña, Daniele Rossi, Edda Beniamino, Cecilia Metra, Chandrasekharan Tirumurti, Rajesh Galivanche
Low-Cost and High-Reduction Approaches for Power Droop during Launch-On-Shift Scan-Based Logic BIST. IEEE Trans. Computers 65 (8) (2016)
Daniele Rossi, Martin Omaña, Cecilia Metra, Alessandro Paccagnella
Impact of Bias Temperature Instability on Soft Error Susceptibility. IEEE Trans. Very Large Scale Integr. Syst. 23 (4) (2015)
Michael A. Kochte, Atefe Dalirsani, Andrea Bernabei, Martin Omaña, Cecilia Metra, Hans-Joachim Wunderlich
Intermittent and Transient Fault Diagnosis on Sparse Code Signatures. ATS (2015)
Martin Omaña, Daniele Rossi, Daniele Giaffreda, Cecilia Metra, T. M. Mak, Asifur Rahman, Simon Tam
Low-Cost On-Chip Clock Jitter Measurement Scheme. IEEE Trans. Very Large Scale Integr. Syst. 23 (3) (2015)
Daniele Rossi, Martin Omaña, Daniele Giaffreda, Cecilia Metra
Modeling and Detection of Hotspot in Shaded Photovoltaic Cells. IEEE Trans. Very Large Scale Integr. Syst. 23 (6) (2015)
Martin Omaña, Daniele Rossi, Edda Beniamino, Cecilia Metra, Chandra Tirumurti, Rajesh Galivanche
Power droop reduction during Launch-On-Shift scan-based logic BIST. DFT (2014)
Daniele Rossi, Martin Omaña, José Manuel Cazeaux, Cecilia Metra, T. M. Mak
Clock Faults Induced Min and Max Delay Violations. J. Electron. Test. 30 (1) (2014)
Martin Omaña, Daniele Rossi, Nicolò Bosio, Cecilia Metra
Low Cost NBTI Degradation Detection and Masking Approaches. IEEE Trans. Computers 62 (3) (2013)
Martin Omaña, Daniele Rossi, Filippo Fuzzi, Cecilia Metra, Chandra Tirumurti, R. Galivache
Novel approach to reduce power droop during scan-based logic BIST. ETS (2013)
Martin Omaña, Daniele Rossi, Daniele Giaffreda, Roberto Specchia, Cecilia Metra, Marcin Marzencki, Bozena Kaminska
Faults Affecting Energy-Harvesting Circuits of Self-Powered Wireless Sensors and Their Possible Concurrent Detection. IEEE Trans. Very Large Scale Integr. Syst. 21 (12) (2013)
Daniele Rossi, Martin Omaña, G. Garrammone, Cecilia Metra, Abhijit Jas, Rajesh Galivanche
Low Cost Concurrent Error Detection Strategy for the Control Logic of High Performance Microprocessors and Its Application to the Instruction Decoder. J. Electron. Test. 29 (3) (2013)
Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, Cecilia Metra, Martin Omaña, Daniele Rossi, Matteo Sonza Reorda, Luca Sterpone, Massimo Violante, Simone Gerardin, M. Bagatin, Alessandro Paccagnella
High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies. DFT (2012)
Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam
New Design for Testability Approach for Clock Fault Testing. IEEE Trans. Computers 61 (4) (2012)
Martin Omaña, Daniele Rossi, G. Collepalumbo, Cecilia Metra, Fabrizio Lombardi
Faults affecting the control blocks of PV arrays and techniques for their concurrent detection. DFT (2012)
Martin Omaña, Cecilia Metra, T. M. Mak, Simon Tam
Low-Cost Dynamic Compensation Scheme for Local Clocks of Next Generation High Performance Microprocessors. IEEE Trans. Very Large Scale Integr. Syst. 19 (12) (2011)
Daniele Giaffreda, Martin Omaña, Daniele Rossi, Cecilia Metra
Model for Thermal Behavior of Shaded Photovoltaic Cells under Hot-Spot Condition. DFT (2011)
Daniele Rossi, Martin Omaña, Cecilia Metra, Alessandro Paccagnella
Impact of Aging Phenomena on Soft Error Susceptibility. DFT (2011)
Martin Omaña, Daniele Rossi, Cecilia Metra
High-Performance Robust Latches. IEEE Trans. Computers 59 (11) (2010)
Daniele Rossi, Martin Omaña, Gianluca Berghella, Cecilia Metra, Abhijit Jas, Chandra Tirumurti, Rajesh Galivanche
Low cost and low intrusive approach to test on-line the scheduler of high performance microprocessors. Conf. Computing Frontiers (2010)
Martin Omaña, Daniele Rossi, Nicolò Bosio, Cecilia Metra
Novel low-cost aging sensor. Conf. Computing Frontiers (2010)
Daniele Rossi, Martin Omaña, Daniele Giaffreda, Cecilia Metra
Secure communication protocol for wireless sensor networks. EWDTS (2010)
Martin Omaña, Daniele Giaffreda, Cecilia Metra, T. M. Mak, Simon Tam, Asifur Rahman
On-die Ring Oscillator Based Measurement Scheme for Process Parameter Variations and Clock Jitter. DFT (2010)
Daniele Rossi, Martin Omaña, Cecilia Metra
Transient Fault and Soft Error On-die Monitoring Scheme. DFT (2010)
Martin Omaña, Daniele Rossi, Cecilia Metra
Novel High Speed Robust Latch. DFT (2009)
Daniele Rossi, José Manuel Cazeaux, Martin Omaña, Cecilia Metra, Abhijit Chatterjee
Accurate Linear Model for SET Critical Charge Estimation. IEEE Trans. Very Large Scale Integr. Syst. 17 (8) (2009)
Martin Omaña, Marcin Marzencki, Roberto Specchia, Cecilia Metra, Bozena Kaminska
Concurrent Detection of Faults Affecting Energy Harvesting Circuits of Self-Powered Wearable Sensors. DFT (2009)
Cecilia Metra, Martin Omaña, T. M. Mak, Asifur Rahman, Simon Tam
Novel On-Chip Clock Jitter Measurement Scheme for High Performance Microprocessors. DFT (2008)
Daniele Rossi, Martin Omaña, Cecilia Metra
Checkers' No-Harm Alarms and Design Approaches to Tolerate Them. J. Electron. Test. 24 (1-3) (2008)
Cecilia Metra, Daniele Rossi, Martin Omaña, Abhijit Jas, Rajesh Galivanche
Function-Inherent Code Checking: A New Low Cost On-Line Testing Approach for High Performance Microprocessor Control Logic. ETS (2008)
Martin Omaña, Daniele Rossi, Cecilia Metra
Latch Susceptibility to Transient Faults and New Hardening Approach. IEEE Trans. Computers 56 (9) (2007)
Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam
Novel compensation scheme for local clocks of high performance microprocessors. ITC (2007)
Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam
Novel Approach to Clock Fault Testing for High Performance Microprocessors. VTS (2007)
Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak
Path (Min) Delay Faults and Their Impact on Self-Checking Circuits' Operation. IOLTS (2006)
Daniele Rossi, Martin Omaña, Cecilia Metra, Andrea Pagni
Checker No-Harm Alarm Robustness. IOLTS (2006)
Martin Omaña, José Manuel Cazeaux, Daniele Rossi, Cecilia Metra
Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects. DATE (2006)
Cecilia Metra, Daniele Rossi, Martin Omaña, José Manuel Cazeaux, T. M. Mak
Can Clock Faults be Detected Through Functional Test? DDECS (2006)
Martin Omaña, O. Losco, Cecilia Metra, Andrea Pagni
On the Selection of Unidirectional Error Detecting Codes for Self-Checking Circuits' Area Overhead and Performance Optimization. IOLTS (2005)
Martin Omaña, Daniele Rossi, Cecilia Metra
Low Cost Scheme for On-Line Clock Skew Compensation. VTS (2005)
José Manuel Cazeaux, Daniele Rossi, Martin Omaña, Cecilia Metra, Abhijit Chatterjee
On Transistor Level Gate Sizing for Increased Robustness to Transient Faults. IOLTS (2005)
Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak
The Other Side of the Timing Equation: a Result of Clock Faults. DFT (2005)
Daniele Rossi, Martin Omaña, Fabio Toma, Cecilia Metra
Multiple Transient Faults in Logic: An Issue for Next Generation ICs. DFT (2005)
Martin Omaña, Daniele Rossi, Cecilia Metra
Low Cost and High Speed Embedded Two-Rail Code Checker. IEEE Trans. Computers 54 (2) (2005)
José Manuel Cazeaux, Martin Omaña, Cecilia Metra
Novel on-chip circuit for jitter testing in high-speed PLLs. IEEE Trans. Instrum. Meas. 54 (5) (2005)
Cecilia Metra, T. M. Mak, Martin Omaña
Are Our Design for Testability Features Fault Secure? DATE (2004)
Cecilia Metra, A. Ferrari, Martin Omaña, Andrea Pagni
Hardware Reconfiguration Scheme for High Availability Systems. IOLTS (2004)
José Manuel Cazeaux, Martin Omaña, Cecilia Metra
Low-Area On-Chip Circuit for Jitter Measurement in a Phase-Locked Loop. IOLTS (2004)
Cecilia Metra, T. M. Mak, Martin Omaña
Risks Associated with Faults within Test Pattern Compactors and Their Implications on Testing. ITC (2004)
Cecilia Metra, T. M. Mak, Martin Omaña
Fault secureness need for next generation high performance microprocessor design for testability structures. Conf. Computing Frontiers (2004)
Martin Omaña, Daniele Rossi, Cecilia Metra
Fast and Low-Cost Clock Deskew Buffer. DFT (2004)
Martin Omaña, Daniele Rossi, Cecilia Metra
Model for Transient Fault Susceptibility of Combinational Circuits. J. Electron. Test. 20 (5) (2004)
Martin Omaña, Daniele Rossi, Cecilia Metra
Novel Transient Fault Hardened Static Latch. ITC (2003)
Martin Omaña, Daniele Rossi, Cecilia Metra
High Speed and Highly Testable Parallel Two-Rail Code Checker. DATE (2003)
Cecilia Metra, Stefano Di Francescantonio, Martin Omaña
Automatic Modification of Sequential Circuits for Self-Checking Implementation. DFT (2003)
Martin Omaña, Giacinto Papasso, Daniele Rossi, Cecilia Metra
A Model for Transient Fault Propagation in Combinatorial Logic. IOLTS (2003)