Novel On-Chip Clock Jitter Measurement Scheme for High Performance Microprocessors.

Cecilia Metra Martin Omaña T. M. Mak Asifur Rahman Simon Tam

Published in: DFT (2008)

Keyphrases

high speed
single chip
vlsi implementation
signal processor
low cost
power consumption
programmable logic
low power consumption
level parallelism
analog vlsi
real time
evolutionary algorithm
wireless sensor networks
signal processing