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Low-Cost On-Chip Clock Jitter Measurement Scheme.
Martin Omaña
Daniele Rossi
Daniele Giaffreda
Cecilia Metra
T. M. Mak
Asifur Rahman
Simon Tam
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2015)
Keyphrases
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low cost
data acquisition
high speed
single chip
low power
digital camera
power consumption
classification scheme
neural network
digital images
embedded systems
vlsi implementation
highly efficient
packet loss
low power consumption