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On Transistor Level Gate Sizing for Increased Robustness to Transient Faults.
José Manuel Cazeaux
Daniele Rossi
Martin Omaña
Cecilia Metra
Abhijit Chatterjee
Published in:
IOLTS (2005)
Keyphrases
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high speed
steady state
artificial intelligence
higher level
fault diagnosis
fault detection
levels of abstraction
search engine
information systems
knowledge base
artificial neural networks
test cases
low power
field effect transistors
silicon dioxide