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Sensitivity Evaluation of TMR-Hardened Circuits to Multiple SEUs Induced by Alpha Particles in Commercial SRAM-Based FPGAs.

Andrea ManuzzatoPaolo RechSimone GerardinAlessandro PaccagnellaLuca SterponeMassimo Violante
Published in: DFT (2007)
Keyphrases
  • sensitivity analysis
  • search engine
  • information systems
  • evaluation method
  • integrated circuit
  • data transmission
  • power reduction