Gianpiero Cabodi

ORCID

Publication Activity (10 Years)

Years Active: 1986-2024
Publications (10 Years): 21

Top Venues

Formal Methods Syst. Des.

CoDIT

FMCAD

DATE

Publications

Gianpiero Cabodi, Paolo E. Camurati, Marco Palena, Paolo Pasini
Hardware Model Checking Algorithms and Techniques. Algorithms 17 (6) (2024)
Gianpiero Cabodi, Paolo E. Camurati, Marco Palena, Paolo Pasini
Interpolation with guided refinement: revisiting incrementality in SAT-based unbounded model checking. Formal Methods Syst. Des. 60 (2) (2022)
Gianpiero Cabodi, Paolo E. Camurati, Alexey Ignatiev, João Marques-Silva, Marco Palena, Paolo Pasini
Optimizing Binary Decision Diagrams for Interpretable Machine Learning Classification. DATE (2021)
Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
Reducing Interpolant Circuit Size Through SAT-Based Weakening. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (7) (2020)
Gianpiero Cabodi, Paolo Camurati, Fabrizio F. Finocchiaro, Danilo Vendraminetto
Model Checking Speculation-Dependent Security Properties: Abstracting and Reducing Processor Models for Sound and Complete Verification. C2SI (2019)
Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
Logic Synthesis for Interpolant Circuit Compaction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (2) (2019)
Edoardo Fadda, Daniele Manerba, Roberto Tadei, Paolo Camurati, Gianpiero Cabodi
KPIs for Optimal Location of charging stations for Electric Vehicles: the Biella case-study. FedCSIS (2019)
Gianpiero Cabodi, Paolo Camurati, Carmelo Loiacono, Marco Palena, Paolo Pasini, Denis Patti, Stefano Quer
To split or to group: from divide-and-conquer to sub-task sharing for verifying multiple properties in model checking. Int. J. Softw. Tools Technol. Transf. 20 (3) (2018)
Gianpiero Cabodi, Paolo Camurati, Alan Mishchenko, Marco Palena, Paolo Pasini
SAT solver management strategies in IC3: an experimental approach. Formal Methods Syst. Des. 50 (1) (2017)
Gianpiero Cabodi, Alessandro Garbo, Carmelo Loiacono, Stefano Quer, Gianluca Francini
Efficient Complex High-Precision Computations on GPUs without Precision Loss. J. Circuits Syst. Comput. 26 (12) (2017)
Syed Tahir Hussain Rizvi, Denis Patti, Tomas Björklund, Gianpiero Cabodi, Gianluca Francini
Deep Classifiers-Based License Plate Detection, Localization and Recognition on GPU-Powered Mobile Platform. Future Internet 9 (4) (2017)
Syed Tahir Hussain Rizvi, Gianpiero Cabodi, Gianluca Francini
GPU-only unified ConvMM layer for neural classifiers. CoDIT (2017)
Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
Interpolation-Based Learning as a Mean to Speed-Up Bounded Model Checking (Short Paper). SEFM (2017)
Gianpiero Cabodi, Paolo Camurati, Sebastiano F. Finocchiaro, Francesco Savarese, Danilo Vendraminetto
Embedded Systems Secure Path Verification at the Hardware/Software Interface. IEEE Des. Test 34 (5) (2017)
Luca Sterpone, Gianpiero Cabodi, Sebastiano F. Finocchiaro, Carmelo Loiacono, Francesco Savarese, Boyang Du
Scalable FPGA graph model to detect routing faults. IOLTS (2016)
Nicolas Boria, Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Stefano Quer
A Greedy Approach to Answer Reachability Queries on DAGs. CoRR (2016)
Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
Reducing interpolant circuit size by ad-hoc logic synthesis and SAT-based weakening. FMCAD (2016)
Syed Tahir Hussain Rizvi, Gianpiero Cabodi, Pedro P. B. de Gusmao, Gianluca Francini
Gabor filter based image representation for object classification. CoDIT (2016)
Nicolas Boria, Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Stefano Quer
A 7/2-Approximation Algorithm for the Maximum Duo-Preservation String Mapping Problem. CPM (2016)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
A graph-labeling approach for efficient cone-of-influence computation in model-checking problems with multiple properties. Softw. Pract. Exp. 46 (4) (2016)
Gianpiero Cabodi, Paolo Camurati, Sebastiano F. Finocchiaro, Carmelo Loiacono, Francesco Savarese, Danilo Vendraminetto
Secure Path Verification. IVSW (2016)
Gianpiero Cabodi, Carmelo Loiacono, Danilo Vendraminetto
Optimization techniques for craig interpolant compaction in unbounded model checking. Formal Methods Syst. Des. 46 (2) (2015)
Gianpiero Cabodi, Marco Palena, Paolo Pasini
Interpolation with Guided Refinement: Revisiting incrementality in SAT-based unbounded model checking. FMCAD (2014)
Gianpiero Cabodi, Paolo Pasini, Stefano Quer, Danilo Vendraminetto
. DATE (2014)
Gianpiero Cabodi, Carmelo Loiacono, Marco Palena, Paolo Pasini, Denis Patti, Stefano Quer, Danilo Vendraminetto, Armin Biere, Keijo Heljanko
Hardware Model Checking Competition 2014: An Analysis and Comparison of Solvers and Benchmarks. J. Satisf. Boolean Model. Comput. 9 (1) (2014)
Gianpiero Cabodi, Carmelo Loiacono, Danilo Vendraminetto
Optimization techniques for craig interpolant compaction in unbounded model checking. DATE (2013)
Marco Palena, Gianpiero Cabodi, Alan Mishchenko
Trading-off Incrementality and Dynamic Restart of Multiple Solvers in IC3. DIFTS@FMCAD (2013)
Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Thread-based multi-engine model checking for multicore platforms. ACM Trans. Design Autom. Electr. Syst. 18 (3) (2013)
Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Interpolation sequences revisited. DATE (2011)
Gianpiero Cabodi, Sergio Nocco
Optimized model checking of multiple properties. DATE (2011)
Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Benchmarking a model checker for algorithmic improvements and tuning for performance. Formal Methods Syst. Des. 39 (2) (2011)
Gianpiero Cabodi, Leandro Dipietro, Marco Murciano, Sergio Nocco
Finding Multiple Equivalence-Preserving Transformations in Combinational Circuits through Incremental-SAT. J. Electron. Test. 26 (2) (2010)
Gianpiero Cabodi, Luz Amanda Garcia, Marco Murciano, Sergio Nocco, Stefano Quer
Partitioning Interpolant-Based Verification for Effective Unbounded Model Checking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (3) (2010)
Gianpiero Cabodi, Luciano Lavagno, Marco Murciano, Alex Kondratyev, Yosinori Watanabe
Speeding-up heuristic allocation, scheduling and binding with SAT-based abstraction/refinement techniques. ACM Trans. Design Autom. Electr. Syst. 15 (2) (2010)
Gianpiero Cabodi, Marco Murciano, Massimo Violante
Boosting software fault injection for dependability analysis of real-time embedded applications. ACM Trans. Embed. Comput. Syst. 10 (2) (2010)
Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Strengthening Model Checking Techniques With Inductive Invariants. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (1) (2009)
Gianpiero Cabodi, Paolo Camurati, Luz Garcia, Marco Murciano, Sergio Nocco, Stefano Quer
Speeding up model checking by exploiting explicit and hidden verification constraints. DATE (2009)
Gianpiero Cabodi, Leandro Dipietro, Marco Murciano, Sergio Nocco
Exploiting incrementality in SAT-based search for multiple equivalence-preserving transformations in combinational circuits. HLDVT (2009)
Gianpiero Cabodi, Marco Murciano, Sergio Nocco, Stefano Quer
Boosting interpolation with dynamic localized abstraction and redundancy removal. ACM Trans. Design Autom. Electr. Syst. 13 (1) (2008)
Gianpiero Cabodi, Paolo Camurati, Luz Garcia, Marco Murciano, Sergio Nocco, Stefano Quer
Trading-Off SAT Search and Variable Quantifications for Effective Unbounded Model Checking. FMCAD (2008)
Gianpiero Cabodi, Paolo Camurati, Marco Murciano
Automated abstraction by incremental refinement in interpolant-based model checking. ICCAD (2008)
Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Boosting the role of inductive invariants in model checking. DATE (2007)
Gabriel P. Bischoff, Karl S. Brace, Gianpiero Cabodi
A Compositional Approach for Equivalence Checking of Sequential Circuits with Unknown Reset State and Overlapping Partitions. EUROCAST (2007)
Gianpiero Cabodi, Marco Murciano
BDD-Based Hardware Verification. SFM (2006)
Gianpiero Cabodi, Marco Murciano, Sergio Nocco, Stefano Quer
Stepping forward with interpolants in unbounded model checking. ICCAD (2006)
Gabriel P. Bischoff, Karl S. Brace, Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Exploiting Target Enlargement and Dynamic Abstraction within Mixed BDD and SAT Invariant Checking. Electron. Notes Theor. Comput. Sci. 119 (2) (2005)
Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Are BDDs still alive within sequential verification? Int. J. Softw. Tools Technol. Transf. 7 (2) (2005)
Gianpiero Cabodi, Marco Crivellari, Sergio Nocco, Stefano Quer
Circuit Based Quantification: Back to State Set Manipulation within Unbounded Model Checking. DATE (2005)
Gianpiero Cabodi, Alex Kondratyev, Luciano Lavagno, Sergio Nocco, Stefano Quer, Yosinori Watanabe
A BMC-based formulation for the scheduling problem of hardware systems. Int. J. Softw. Tools Technol. Transf. 7 (2) (2005)
Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Improving SAT-based Bounded Model Checking by Means of BDD-based Approximate Traversals. J. Univers. Comput. Sci. 10 (12) (2004)
Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Improving SAT-Based Bounded Model Checking by Means of BDD-Based Approximate Traversals. DATE (2003)
Gianpiero Cabodi, Sergio Nocco, Stefano Quer, Alex Kondratyev, Luciano Lavagno, Yosinori Watanabe
A BMC-formulation for the scheduling problem in highly constrained hardware Systems. Electron. Notes Theor. Comput. Sci. 89 (4) (2003)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Can BDDs compete with SAT solvers on bounded model checking? DAC (2002)
Luciano Lavagno, Mihai T. Lazarescu, Stefano Quer, Sergio Nocco, Claudio Passerone, Gianpiero Cabodi
A Symbolic Approach for the Combined Solution of Scheduling and Allocation. ISSS (2002)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Dynamic Scheduling and Clustering in Symbolic Image Computation. DATE (2002)
Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Mixing Forward and Backward Traversals in Guided-Prioritized BDD-Based Verification. CAV (2002)
Gianpiero Cabodi
Meta-BDDs: A Decomposed Representation for Layered Symbolic Manipulation of Boolean Functions. CAV (2001)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Reachability analysis of large circuits using disjunctive partitioning and partial iterative squaring. J. Syst. Archit. 47 (2) (2001)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Biasing symbolic search by means of dynamic activity profiles. DATE (2001)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Improving symbolic reachability analysis by means of activityprofiles. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19 (9) (2000)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Symbolic forward/backward traversals of large finite state machines. J. Syst. Archit. 46 (12) (2000)
Stefano Quer, Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Ellen Sentovich, Robert K. Brayton
Verification of Similar FSMs by Mixing Incremental Re-encoding, Reachability Analysis, and Combinational Checks. Formal Methods Syst. Des. 17 (2) (2000)
Gianpiero Cabodi, Stefano Quer, Fabio Somenzi
Optimizing sequential verification by retiming transformations. DAC (2000)
Gianpiero Cabodi, Paolo Camurati, Claudio Passerone, Stefano Quer
Computing Timed Transition Relations for Sequential Cycle-Based Simulation. DATE (1999)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Improving the efficiency of BDD-based operators by means of partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18 (5) (1999)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Improving Symbolic Traversals by Means of Activity Profiles. DAC (1999)
Gianpiero Cabodi, Stefano Quer, Paolo Camurati
Memory Optimization in Function and Set Manipulation with BDDs. Softw. Pract. Exp. 28 (1) (1998)
Gianpiero Cabodi, Stefano Quer, Christoph Meinel, Harald Sack, Anna Slobodová, Christian Stangier
Binary Decision Diagrams and the Multiple Variable Order Problem Universität Trier, Mathematik/Informatik, Forschungsbericht (1998)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Auxiliary variables for BDD-based representation and manipulation of Boolean functions. ACM Trans. Design Autom. Electr. Syst. 3 (3) (1998)
Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
The General Product Machine: a New Model for Symbolic FSM Traversal. Formal Methods Syst. Des. 12 (3) (1998)
Gianpiero Cabodi, Paolo Camurati, Antonio Lioy, Massimo Poncino, Stefano Quer
A parallel approach to symbolic traversal based on set partitioning. CHARME (1997)
Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Stefano Quer
Verification and synthesis of counters based on symbolic techniques. ED&TC (1997)
Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Stefano Quer
Disjunctive Partitioning and Partial Iterative Squaring: An Effective Approach for Symbolic Traversal of Large Circuits. DAC (1997)
Gianpiero Cabodi, Paolo Camurati
Symbolic FSM traversals based on the transition relation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16 (5) (1997)
Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Stefano Quer, Robert K. Brayton, Ellen Sentovich
Incremental re-encoding for symbolic traversal of product machines. EURO-DAC (1996)
Gianpiero Cabodi, Luciano Lavagno, Enrico Macii, Massimo Poncino, Stefano Quer, Paolo Camurati, Ellen Sentovich
Enhancing FSM Traversal by Temporary Re-Encoding. ICCD (1996)
Stefano Quer, Gianpiero Cabodi, Paolo Camurati
Decomposed symbolic forward traversals of large finite state machines. EURO-DAC (1996)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Improved reachability analysis of large finite state machines. ICCAD (1996)
Gianpiero Cabodi, Stefano Quer, Paolo Camurati
Computing subsets of equivalence classes for large FSMs. EURO-DAC (1995)
Gianpiero Cabodi, Stefano Quer, Paolo Camurati
Transforming boolean relations by symbolic encoding. CHARME (1995)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Symbolic exploration of large circuits with enhanced forward/backward traversals. EURO-DAC (1994)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Efficient State Space Pruning in Symbolic Backward Traversal. ICCD (1994)
Gianpiero Cabodi, Silvano Gai, Maurizio Rebaudengo, Matteo Sonza Reorda
A BDD Package For A Massively Parallel SIMD Architecture. PDP (1994)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Full-Symbolic ATPG for Large Circuits. ITC (1994)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Symbolic traversals of data paths with auxiliary variables. Great Lakes Symposium on VLSI (1994)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Auxiliary Variables for Extending Symbolic Traversal Techniques to Data Paths. DAC (1994)
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Detecting hard faults with combined approximate forward/backward symbolic techniques. ISCAS (1994)
Gianpiero Cabodi, Paolo Camurati
Exploiting Cofactoring for Efficient FSM Symbolic Traversal Based on the Transition Relation. ICCD (1993)
Gianpiero Balboni, Gianpiero Cabodi, Silvano Gai, Matteo Sonza Reorda
A Parallel System for Test Pattern Generation. Parallel Comput. 19 (2) (1993)
Gianpiero Cabodi, Paolo Camurati
Advancements in Symbolic Traversal Technique. CHARME (1993)
Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
An approach to sequential circuit diagnosis based on formal verification techniques. J. Electron. Test. 4 (1) (1993)
Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
Cross-fertilizing FSM verification techniques and sequential diagnosis. EURO-DAC (1992)
Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Silvano Gai, Paolo Prinetto, Matteo Sonza Reorda
A New Model for Improving symbolic Product Machine Traversal. DAC (1992)
Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
Sequential Circuit Diagnosis Based on Formal Verification Techniques. ITC (1992)
Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda
TPDL: Extended Temporal Profile Description Language. Softw. Pract. Exp. 21 (4) (1991)
Gianpiero Balboni, Gianpiero Cabodi, Silvano Gai, D. Sismondi, Matteo Sonza Reorda
A parallel system for test pattern generation. SPDP (1991)
Gianpiero Cabodi, Silvano Gai, Matteo Sonza Reorda
Fast Differential Fault Simulation by Dynamic Fault Ordering. ICCD (1991)
Gianpiero Cabodi, Silvano Gai, Matteo Sonza Reorda
A transputer-based gate-level fault simulator. Microprocessing and Microprogramming 30 (1-5) (1990)
Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda
. Microprocessing and Microprogramming 26 (4) (1989)
Gianpiero Cabodi, Silvano Gai, Marco Mezzalama, Pier Luca Montessoro, Fabio Somenzi
Fault simulation in a multilevel environment: the MOZART approach. FTCS (1988)

Gianpiero Cabodi

Publication Activity (10 Years)

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