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Reducing Interpolant Circuit Size Through SAT-Based Weakening.

Gianpiero CabodiPaolo CamuratiMarco PalenaPaolo PasiniDanilo Vendraminetto
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
Keyphrases
  • computational complexity
  • reinforcement learning
  • control system
  • high speed
  • planning problems
  • answer set programming
  • maximum number
  • small size
  • ai planning