Marco Palena

Publication Activity (10 Years)

Years Active: 2013-2024
Publications (10 Years): 13

Top Topics

Reachability Queries

Temporal Properties

Formal Specification

Top Venues

Formal Methods Syst. Des.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Gianpiero Cabodi, Paolo E. Camurati, Marco Palena, Paolo Pasini
Hardware Model Checking Algorithms and Techniques. Algorithms 17 (6) (2024)
Gianpiero Cabodi, Paolo E. Camurati, Marco Palena, Paolo Pasini
Interpolation with guided refinement: revisiting incrementality in SAT-based unbounded model checking. Formal Methods Syst. Des. 60 (2) (2022)
Gianpiero Cabodi, Paolo E. Camurati, Alexey Ignatiev, João Marques-Silva, Marco Palena, Paolo Pasini
Optimizing Binary Decision Diagrams for Interpretable Machine Learning Classification. DATE (2021)
Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
Reducing Interpolant Circuit Size Through SAT-Based Weakening. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (7) (2020)
Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
Logic Synthesis for Interpolant Circuit Compaction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (2) (2019)
Gianpiero Cabodi, Paolo Camurati, Carmelo Loiacono, Marco Palena, Paolo Pasini, Denis Patti, Stefano Quer
To split or to group: from divide-and-conquer to sub-task sharing for verifying multiple properties in model checking. Int. J. Softw. Tools Technol. Transf. 20 (3) (2018)
Riccardo Cantoro, Farrokh Ghani Zadegan, Marco Palena, Paolo Pasini, Erik Larsson, Matteo Sonza Reorda
Test of Reconfigurable Modules in Scan Networks. IEEE Trans. Computers 67 (12) (2018)
Gianpiero Cabodi, Paolo Camurati, Alan Mishchenko, Marco Palena, Paolo Pasini
SAT solver management strategies in IC3: an experimental approach. Formal Methods Syst. Des. 50 (1) (2017)
Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
Interpolation-Based Learning as a Mean to Speed-Up Bounded Model Checking (Short Paper). SEFM (2017)
Nicolas Boria, Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Stefano Quer
A Greedy Approach to Answer Reachability Queries on DAGs. CoRR (2016)
Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
Reducing interpolant circuit size by ad-hoc logic synthesis and SAT-based weakening. FMCAD (2016)
Nicolas Boria, Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Stefano Quer
A 7/2-Approximation Algorithm for the Maximum Duo-Preservation String Mapping Problem. CPM (2016)
Riccardo Cantoro, Marco Palena, Paolo Pasini, Matteo Sonza Reorda
Test Time Minimization in Reconfigurable Scan Networks. ATS (2016)
Gianpiero Cabodi, Marco Palena, Paolo Pasini
Interpolation with Guided Refinement: Revisiting incrementality in SAT-based unbounded model checking. FMCAD (2014)
Gianpiero Cabodi, Carmelo Loiacono, Marco Palena, Paolo Pasini, Denis Patti, Stefano Quer, Danilo Vendraminetto, Armin Biere, Keijo Heljanko
Hardware Model Checking Competition 2014: An Analysis and Comparison of Solvers and Benchmarks. J. Satisf. Boolean Model. Comput. 9 (1) (2014)
Carmelo Loiacono, Marco Palena, Paolo Pasini, Denis Patti, Stefano Quer, S. Ricossa, Danilo Vendraminetto, J. Baumgartner
Fast cone-of-influence computation and estimation in problems with multiple properties. DATE (2013)
Marco Palena, Gianpiero Cabodi, Alan Mishchenko
Trading-off Incrementality and Dynamic Restart of Multiple Solvers in IC3. DIFTS@FMCAD (2013)