Khaled Benkrid

Publication Activity (10 Years)

Years Active: 1999-2015
Publications (10 Years): 2

Top Venues

AHS

IEEE Trans. Computers

EMBC

ACM Trans. Reconfigurable Technol. Syst.

Publications

Hanaa M. Hussain, Khaled Benkrid, Huseyin Seker
Dynamic partial reconfiguration implementation of the SVM/KNN multi-classifier on FPGA for bioinformatics application. EMBC (2015)
Xabier Iturbe, Khaled Benkrid, Chuan Hong, Ali Ebrahim, Raul Torrego, Tughrul Arslan
Microkernel Architecture and Hardware Abstraction Layer of a Reliable Reconfigurable Real-Time Operating System (R3TOS). ACM Trans. Reconfigurable Technol. Syst. 8 (1) (2015)
Xabier Iturbe, Ali Ebrahim, Khaled Benkrid, Chuan Hong, Tughrul Arslan, Jon Pérez, Didier Keymeulen, Marco D. Santambrogio
R3TOS-Based Autonomous Fault-Tolerant Systems. IEEE Micro 34 (6) (2014)
Muhammad Imran, Khaled Benkrid, Khursheed Khursheed, Naeem Ahmad, Mattias O'Nils, Najeem Lawal
Analysis and characterization of embedded vision systems for taxonomy formulation. Real-Time Image and Video Processing (2013)
Xabier Iturbe, Khaled Benkrid, Chuan Hong, Ali Ebrahim, Tughrul Arslan, Imanol Martinez
Runtime Scheduling, Allocation, and Execution of Real-Time Hardware Tasks onto Xilinx FPGAs Subject to Fault Occurrence. Int. J. Reconfigurable Comput. 2013 (2013)
Wei Zhou, Tughrul Arslan, Khaled Benkrid, Ahmed O. El-Rayis, Nakul Haridas
Reconfigurable feeding network for GSM/GPS/3G/WiFi and global LTE applications. ISCAS (2013)
Abdsamad Benkrid, Khaled Benkrid
A statistical framework to minimise and predict the range values of quantisation errors in fixed-point FIR filters architectures. Digit. Signal Process. 23 (1) (2013)
Ali Ebrahim, Khaled Benkrid, Jalal Khalifat, Chuan Hong
A platform for secure IP integration in Xilinx Virtex FPGAs. ReConFig (2013)
Khaled Benkrid, Didier Keymeulen, Umeshkumar D. Patel, David Merodio Codinachs
Guest Editors' introduction: Special section on adaptive hardware and systems. IEEE Trans. Computers 62 (8) (2013)
Xabier Iturbe, Khaled Benkrid, Chuan Hong, Ali Ebrahim, Raul Torrego, Imanol Martinez, Tughrul Arslan, Jon Pérez
R3TOS: A Novel Reliable Reconfigurable Real-Time Operating System for Highly Adaptive, Efficient, and Dependable Computing on FPGAs. IEEE Trans. Computers 62 (8) (2013)
Ali Ebrahim, Khaled Benkrid, Xabier Iturbe, Chuan Hong
Multiple-clone configuration of relocatable partial bitstreams in Xilinx Virtex FPGAs. AHS (2013)
Hanaa M. Hussain, Khaled Benkrid, Huseyin Seker
Reconfiguration-based implementation of SVM classifier on FPGA for Classifying Microarray data. EMBC (2013)
Khaled Benkrid, Didier Keymeulen, David Merodio, Michael Newell, Rainer Wansch, Umeshkumar D. Patel, Ahmet T. Erdogan, Niels Hadaschik, Luca Sterpone, Jelle Poupaert, Massimo Violante
Preface. AHS (2013)
Chuan Hong, Khaled Benkrid, Mohd Nazrin Md. Isa, Xabier Iturbe
A run-time reconfigurable system for adaptive high performance efficient computing. SIGARCH Comput. Archit. News 41 (5) (2013)
Thomas P. Perry, Richard L. Walke, Rob Payne, Stefan Petko, Khaled Benkrid
IP-XACT extensions for IP interoperability guarantees and software model generation. FPL (2012)
Ben Hopson, Khaled Benkrid, Didier Keymeulen, Nazeeh Aranki
Real-time CCSDS lossless adaptive hyperspectral image compression on parallel GPGPU & multicore processor systems. AHS (2012)
Hanaa M. Hussain, Khaled Benkrid, Chuan Hong, Huseyin Seker
An adaptive FPGA implementation of multi-core K-nearest neighbour ensemble classifier using dynamic partial reconfiguration. FPL (2012)
Raul Torrego, Inaki Val, Eñaut Muxika, Xabier Iturbe, Khaled Benkrid
Data coding functions for Software Defined Radios implemented on R3TOS. FPL (2012)
Khaled Benkrid, Esam El-Araby, Miaoqing Huang, Kentaro Sano, Thomas Steinke
High-Performance Reconfigurable Computing. Int. J. Reconfigurable Comput. 2012 (2012)
Khaled Benkrid, Thomas Clayton
Digital Hardware Design Teaching: An Alternative Approach. ACM Trans. Comput. Educ. 12 (4) (2012)
Chuan Hong, Khaled Benkrid, Xabier Iturbe, Ali Ebrahim
Design and implementation of fault-tolerant soft processors on FPGAs. FPL (2012)
Mohd Nazrin Md. Isa, Khaled Benkrid, Thomas Clayton
Efficient architecture and scheduling technique for pairwise sequence alignment. SIGARCH Comput. Archit. News 40 (4) (2012)
Chris Ponder, Khaled Benkrid, Abdsamad Benkrid
A generic computer platform for efficient iris recognition. ICB (2012)
Xiang Tian, Khaled Benkrid
Implementation of the Longstaff and Schwartz American Option Pricing Model on FPGA. J. Signal Process. Syst. 67 (1) (2012)
Xabier Iturbe, Khaled Benkrid, Raul Torrego, Ali Ebrahim, Tughrul Arslan
Online clock routing in Xilinx FPGAs for high-performance and reliability. AHS (2012)
Ali Ebrahim, Khaled Benkrid, Xabier Iturbe, Chuan Hong
A novel high-performance fault-tolerant ICAP controller. AHS (2012)
Hanaa M. Hussain, Khaled Benkrid, Ali Ebrahim, Ahmet T. Erdogan, Huseyin Seker
Novel Dynamic Partial Reconfiguration Implementation of K-Means Clustering on FPGAs: Comparative Results with GPPs and GPUs. Int. J. Reconfigurable Comput. 2012 (2012)
Khaled Benkrid, Ali Akoglu, Cheng Ling, Yang Song, Ying Liu, Xiang Tian
High Performance Biological Pairwise Sequence Alignment: FPGA versus GPU versus Cell BE versus GPP. Int. J. Reconfigurable Comput. 2012 (2012)
Hanaa M. Hussain, Khaled Benkrid, Huseyin Seker
An adaptive implementation of a dynamically reconfigurable K-nearest neighbour classifier on FPGA. AHS (2012)
Cheng Ling, Khaled Benkrid, Tsuyoshi Hamada
High performance phylogenetic analysis on CUDA-compatible GPUs. SIGARCH Comput. Archit. News 40 (5) (2012)
Server Kasap, Khaled Benkrid
Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA-Based Supercomputer. J. Comput. 7 (6) (2012)
Mohd Nazrin Md. Isa, Khaled Benkrid, Thomas Clayton
A novel efficient FPGA architecture for HMMER acceleration. ReConFig (2012)
Server Kasap, Khaled Benkrid
High Performance Phylogenetic Analysis With Maximum Parsimony on Reconfigurable Hardware. IEEE Trans. Very Large Scale Integr. Syst. 19 (5) (2011)
Mohd Nazrin Md. Isa, Khaled Benkrid, Thomas Clayton, Cheng Ling, Ahmet T. Erdogan
An FPGA-based parameterised and scalable optimal solutions for pairwise biological sequence analysis. AHS (2011)
Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Chuan Hong, Imanol Martinez
Empty Resource Compaction Algorithms for Real-Time Hardware Tasks Placement on Partially Reconfigurable FPGAs Subject to Fault Ocurrence. ReConFig (2011)
Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Chuan Hong, Ahmet T. Erdogan, Imanol Martinez
Enabling FPGAs for future deep space exploration missions: Improving fault-tolerance and computation density with R3TOS. AHS (2011)
Cheng Ling, Khaled Benkrid, Ahmet T. Erdogan
High performance Intra-task parallelization of Multiple Sequence Alignments on CUDA-compatible GPUs. AHS (2011)
Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Raul Torrego, Imanol Martinez
Methods and Mechanisms for Hardware Multitasking: Executing and Synchronizing Fully Relocatable Hardware Tasks in Xilinx FPGAs. FPL (2011)
Xabier Iturbe, Khaled Benkrid, Ali Ebrahim, Chuan Hong, Tughrul Arslan, Imanol Martinez
Snake: An Efficient Strategy for the Reuse of Circuitry and Partial Computation Results in High-Performance Reconfigurable Computing. ReConFig (2011)
Hanaa M. Hussain, Khaled Benkrid, Ahmet T. Erdogan, Huseyin Seker
Highly Parameterized K-means Clustering on FPGAs: Comparative Results with GPPs and GPUs. ReConFig (2011)
Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Mikel Azkarate-askasua, Imanol Martinez
Scheduler for Real-Time HW Tasks. ARC (2011)
Server Kasap, Khaled Benkrid
A high performance implementation for Molecular Dynamics simulations on a FPGA supercomputer. AHS (2011)
Koldo Basterretxea, Khaled Benkrid
Embedded high-speed Model Predictive Controller on a FPGA. AHS (2011)
Chuan Hong, Khaled Benkrid, Xabier Iturbe, Ahmet T. Erdogan, Tughrul Arslan
An FPGA task allocator with preliminary First-Fit 2D packing algorithms. AHS (2011)
Chuan Hong, Khaled Benkrid, Xabier Iturbe, Ali Ebrahim, Tughrul Arslan
Efficient On-Chip Task Scheduler and Allocator for Reconfigurable Operating Systems. IEEE Embed. Syst. Lett. 3 (3) (2011)
Hanaa M. Hussain, Khaled Benkrid, Huseyin Seker, Ahmet T. Erdogan
FPGA implementation of K-means algorithm for bioinformatics application: An accelerated approach to clustering Microarray data. AHS (2011)
Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Imanol Martinez, Mikel Azkarate-askasua
ATB: Area-Time response Balancing algorithm for scheduling real-time hardware tasks. FPT (2010)
Xiang Tian, Khaled Benkrid
High-Performance Quasi-Monte Carlo Financial Simulation: FPGA vs. GPP vs. GPU. ACM Trans. Reconfigurable Technol. Syst. 3 (4) (2010)
Wael Adi, Khaled Benkrid
Ultimate design security in self-reconfiguring non-volatile environments. AHS (2010)
Keisuke Dohi, Khaled Benkrid, Cheng Ling, Tsuyoshi Hamada, Yuichiro Shibata
Highly efficient mapping of the Smith-Waterman algorithm on CUDA-compatible GPUs. ASAP (2010)
Wael Adi, Khaled Benkrid
Adaptive and evolvable hardware security architectures. AHS (2010)
Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Imanol Martinez, Mikel Azkarate-askasua, Alicia Morales-Reyes
Evolutionary Dynamic Allocation of Relocatable Modules onto Partially Damaged Xilinx FPGAs. ERSA (2010)
Xiang Tian, Khaled Benkrid
Fixed-Point Arithmetic Error Estimation in Monte-Carlo Simulations. ReConFig (2010)
Cheng Ling, Khaled Benkrid
Design and implementation of a CUDA-compatible GPU-based core for gapped BLAST algorithm. ICCS (1) (2010)
Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Imanol Martinez, Mikel Azkarate-askasua, Marco D. Santambrogio
A Roadmap for Autonomous Fault-Tolerant Systems. DASIP (2010)
Xabier Iturbe, Khaled Benkrid, Ahmet T. Erdogan, Tughrul Arslan, Mikel Azkarate-askasua, Imanol Martinez, Antonio Perez
R3TOS: A reliable reconfigurable real-time operating system. AHS (2010)
Xuezheng Chu, Khaled Benkrid, John Thompson
Rapid Prototyping of an Improved Cholesky Decomposition Based MIMO Detector on FPGAs. AHS (2009)
Server Kasap, Khaled Benkrid, Ying Liu
A high performance fpga-based implementation of position specific iterated blast. FPGA (2009)
Ying Liu, Khaled Benkrid, Abdsamad Benkrid, Server Kasap
An FPGA-Based Web Server for High Performance Biological Sequence Alignment. AHS (2009)
Tsuyoshi Hamada, Keigo Nitadori, Khaled Benkrid, Yousuke Ohno, Gentaro Morimoto, Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri, Makoto Taiji
A novel multiple-walk parallel algorithm for the Barnes-Hut treecode on GPUs - towards cost effective, high performance N-body simulation. Comput. Sci. Res. Dev. 24 (1-2) (2009)
Khaled Benkrid, Ying Liu, Abdsamad Benkrid
A Highly Parameterized and Efficient FPGA-Based Skeleton for Pairwise Biological Sequence Alignment. IEEE Trans. Very Large Scale Integr. Syst. 17 (4) (2009)
Tsuyoshi Hamada, Khaled Benkrid, Keigo Nitadori, Makoto Taiji
A Comparative Study on ASIC, FPGAs, GPUs and General Purpose Processors in the O(N^2) Gravitational N-body Simulation. AHS (2009)
Abdsamad Benkrid, Khaled Benkrid
Novel Area-Efficient FPGA Architectures for FIR Filtering With Symmetric Signal Extension. IEEE Trans. Very Large Scale Integr. Syst. 17 (5) (2009)
Xiang Tian, Khaled Benkrid
Mersenne Twister Random Number Generation on FPGA, CPU and GPU. AHS (2009)
Cheng Ling, Khaled Benkrid, Tsuyoshi Hamada
A parameterisable and scalable Smith-Waterman algorithm implementation on CUDA-compatible GPUs. SASP (2009)
Khaled Benkrid, Panagiotis Velentzas, Server Kasap
A High Performance Reconfigurable Core for Motif Searching Using Profile HMM. AHS (2008)
Server Kasap, Khaled Benkrid, Ying Liu
Design and Implementation of an FPGA-based Core for Gapped BLAST Sequence Alignment with the Two-Hit Method. Eng. Lett. 16 (3) (2008)
Abdsamad Benkrid, Khaled Benkrid
HIDE+: A Logic Based Hardware Development Environment. Eng. Lett. 16 (3) (2008)
Arjun K. Pai, Khaled Benkrid
Multi-Criteria Optimization and Performance Measurement of Domain-Specific Reconfigurable Architectures Targeting Image and Video Processing Applications. ERSA (2008)
Xiang Tian, Khaled Benkrid
Design and implementation of a high performance financial Monte-Carlo simulation engine on an FPGA supercomputer. FPT (2008)
Xiang Tian, Khaled Benkrid
Massively Parallelized Quasi-Monte Carlo financial Simulation on a FPGA Supercomputer. HPRCTA@SC (2008)
Server Kasap, Khaled Benkrid, Ying Liu
High performance FPGA-based core for BLAST sequence alignment with the two-hit method. BIBE (2008)
Xiang Tian, Khaled Benkrid, Xiaochen Gu
High Performance Monte-Carlo Based Option Pricing on FPGAs. Eng. Lett. 16 (3) (2008)
Khaled Benkrid, Ying Liu, Abdsamad Benkrid
High Performance Biosequence Database Scanning using FPGAs. ICASSP (1) (2007)
Khaled Benkrid, Abdsamad Benkrid, Samir Belkacemi
Efficient FPGA hardware development: A multi-language approach. J. Syst. Archit. 53 (4) (2007)
Khaled Benkrid, Ying Liu, Abdsamad Benkrid
Design and Implementation of a Highly Parameterised FPGA-Based Skeleton for Pairwise Biological Sequence Alignment. FCCM (2007)
Arjun K. Pai, Khaled Benkrid
Power Efficient Domain-Specific Reconfigurable Architectures for System-on-Chip Applications. ERSA (2007)
Khaled Benkrid, Samir Belkacemi, Abdsamad Benkrid
HIDE: A hardware intelligent description environment. Microprocess. Microsystems 30 (6) (2006)
Abdsamad Benkrid, Khaled Benkrid
Handling finite length signals borders in two-channel multirate filter banks for perfect reconstruction. Signal Process. 86 (2) (2006)
Khaled Benkrid, Samir Belkacemi
An integrated framework for the high level design of high performance signal processing circuits on FPGAs (abstract only). FPGA (2005)
Arjun K. Pai, Khaled Benkrid, Danny Crookes
Embedded Reconfigurable DCT Architectures Using Adder-Based Distributed Arithmetic. CAMP (2005)
S. Sukhsawas, Khaled Benkrid
A High-Level Implementation of a High Performance Pipeline FFT on Virtex-E FPGAs. ISVLSI (2004)
Khaled Benkrid, Danny Crookes
From application descriptions to hardware in seconds: a logic-based approach to bridging the gap. IEEE Trans. Very Large Scale Integr. Syst. 12 (4) (2004)
Abdsamad Benkrid, Khaled Benkrid, Danny Crookes
Design and Implementation of Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs. ISVLSI (2004)
Abdsamad Benkrid, Khaled Benkrid, Danny Crookes
Design and Implementation of a Generic 2-D Orthogonal Discrete Wavelet Transform on FPGA. FCCM (2003)
Abdsamad Benkrid, Danny Crookes, Khaled Benkrid
Design framework for the implementation of the 2-D orthogonal discrete wavelet transform on FPGA. FPGA (2003)
Khaled Benkrid, Danny Crookes
New bit-level algorithm for general purpose median filtering. J. Electronic Imaging 12 (2) (2003)
Khaled Benkrid, Samir Belkacemi, Danny Crookes
A logic based approach to hardware abstraction. FPGA (2003)
Khaled Benkrid, S. Sukhsawas, Danny Crookes, Samir Belkacemi
A single-FPGA implementation of image connected component labelling. FPGA (2003)
Samir Belkacemi, Khaled Benkrid, Danny Crookes
A Logic Based Hardware Development Environment. FCCM (2003)
Abdsamad Benkrid, Khaled Benkrid, Danny Crookes
Design and Implementation of a Novel FIR Filter Architecture with Boundary Handling on Xilinx VIRTEX FPGAs. FPL (2003)
Abdsamad Benkrid, Khaled Benkrid, Danny Crookes
Minimisation and prediction of the error dynamic range in finite wordlength FIR based architectures: application to the 2-D orthogonal DWT. ISSPA (2) (2003)
Abdsamad Benkrid, Khaled Benkrid, Danny Crookes
A Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs. FCCM (2003)
Abdsamad Benkrid, Khaled Benkrid, Danny Crookes
A novel approach for diminishing and predicting the error dynamic range in finite wordlength FIR based architectures. ICASSP (2) (2003)
Khaled Benkrid, S. Sukhsawas, Danny Crookes, Abdsamad Benkrid
An FPGA-Based Image Connected Component Labeller. FPL (2003)
Khaled Benkrid, Danny Crookes, Abdsamad Benkrid
Towards a general framework for FPGA based image processing using hardware skeletons. Parallel Comput. 28 (7-8) (2002)
Khaled Benkrid
A multiplier-less FPGA core for image algebra neighbourhood operations. FPT (2002)
Khaled Benkrid, Danny Crookes, Abdsamad Benkrid, Samir Belkacemi
A Prolog-Based Hardware Development Environment. FPL (2002)
Samir Belkacemi, Khaled Benkrid, Danny Crookes
HIDE: a logic based hardware intelligent description environment. FPT (2002)
Khaled Benkrid, Danny Crookes, Abdsamad Benkrid
Design and implementation of a novel algorithm for general purpose median filtering on FPGAs. ISCAS (4) (2002)

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Publication Activity (10 Years)

Top Topics

Top Venues

Khaled Benkrid