Server Kasap

Publication Activity (10 Years)

Years Active: 2008-2022
Publications (10 Years): 10

Top Topics

Hardware Implementation

Reconfigurable Hardware

Matrix Multiplication

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Eduardo Weber Wächter, Server Kasap, Sefki Kolozali, Xiaojun Zhai, Shoaib Ehsan, Klaus D. McDonald-Maier
Using Machine Learning for Anomaly Detection on a System-on-Chip under Gamma Radiation. CoRR (2022)
Sangeet Saha, Adewale Adetomi, Xiaojun Zhai, Server Kasap, Shoaib Ehsan, Tughrul Arslan, Klaus D. McDonald-Maier
EnSuRe: Energy & Accuracy Aware Fault-tolerant Scheduling on Real-time Heterogeneous Systems. IOLTS (2021)
Server Kasap, Eduardo Weber Wächter, Xiaojun Zhai, Shoaib Ehsan, Klaus D. McDonald-Maier
Survey of Soft Error Mitigation Techniques Applied to LEON3 Soft Processors on SRAM-Based FPGAs. IEEE Access 8 (2020)
Eduardo Weber Wächter, Server Kasap, Xiaojun Zhai, Shoaib Ehsan, Klaus D. McDonald-Maier
A Framework and Protocol for Dynamic Management of Fault Tolerant Systems in Harsh Environments. IOLTS (2020)
Server Kasap, Eduardo Weber Wächter, Xiaojun Zhai, Shoaib Ehsan, Klaus D. McDonald-Maier
Novel Lockstep-based Approach with Roll-back and Roll-forward Recovery to Mitigate Radiation-Induced Soft Errors. NorCAS (2020)
Eduardo Weber Wächter, Server Kasap, Xiaojun Zhai, Shoaib Ehsan, Klaus D. McDonald-Maier
Survey of Lockstep based Mitigation Techniques for Soft Errors in Embedded Systems. CEEC (2019)
Server Kasap, Soydan Redif
High-Performance System-on-Chip-Based Accelerator System for Polynomial Matrix Multiplications. Circuits Syst. Signal Process. 38 (12) (2019)
Server Kasap, Soydan Redif, Eduardo Wächter
Acceleration of Polynomial Matrix Multiplication on Zynq-7000 System-on-Chip. SoCC (2019)
Manuel Carcenac, Soydan Redif, Server Kasap
GPU parallelization of the sequential matrix diagonalization algorithm and its application to high-dimensional data. J. Supercomput. 73 (8) (2017)
Soydan Redif, Server Kasap
Novel Reconfigurable Hardware Architecture for Polynomial Matrix Multiplications. IEEE Trans. Very Large Scale Integr. Syst. 23 (3) (2015)
Server Kasap, Soydan Redif
Novel reconfigurable hardware implementation of polynomial matrix/vector multiplications. FPT (2014)
Server Kasap, Soydan Redif
Novel Field-Programmable Gate Array Architecture for Computing the Eigenvalue Decomposition of Para-Hermitian Polynomial Matrices. IEEE Trans. Very Large Scale Integr. Syst. 22 (3) (2014)
Server Kasap, Soydan Redif
FPGA implementation of a second-order convolutive blind signal separation algorithm. SIU (2013)
Server Kasap, Soydan Redif
FPGA-based design and implementation of an approximate polynomial matrix EVD algorithm. FPT (2012)
Server Kasap, Khaled Benkrid
Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA-Based Supercomputer. J. Comput. 7 (6) (2012)
Server Kasap, Khaled Benkrid
High Performance Phylogenetic Analysis With Maximum Parsimony on Reconfigurable Hardware. IEEE Trans. Very Large Scale Integr. Syst. 19 (5) (2011)
Server Kasap, Khaled Benkrid
A high performance implementation for Molecular Dynamics simulations on a FPGA supercomputer. AHS (2011)
Server Kasap, Khaled Benkrid, Ying Liu
A high performance fpga-based implementation of position specific iterated blast. FPGA (2009)
Ying Liu, Khaled Benkrid, Abdsamad Benkrid, Server Kasap
An FPGA-Based Web Server for High Performance Biological Sequence Alignment. AHS (2009)
Khaled Benkrid, Panagiotis Velentzas, Server Kasap
A High Performance Reconfigurable Core for Motif Searching Using Profile HMM. AHS (2008)
Server Kasap, Khaled Benkrid, Ying Liu
Design and Implementation of an FPGA-based Core for Gapped BLAST Sequence Alignment with the Two-Hit Method. Eng. Lett. 16 (3) (2008)
Server Kasap, Khaled Benkrid, Ying Liu
High performance FPGA-based core for BLAST sequence alignment with the two-hit method. BIBE (2008)