Novel reconfigurable hardware implementation of polynomial matrix/vector multiplications.
Server KasapSoydan RedifPublished in: FPT (2014)
Keyphrases
- hardware implementation
- symmetric matrix
- sparse matrix
- signal processing
- efficient implementation
- software implementation
- field programmable gate array
- hardware design
- fpga implementation
- dedicated hardware
- symmetric matrices
- eigenvalues and eigenvectors
- image processing algorithms
- positive semidefinite
- rows and columns
- eigenvalue decomposition
- hardware architecture
- covariance matrix
- transformation matrix
- memory management
- singular value decomposition
- vector space
- fpga technology
- pipeline architecture
- matrix representation
- pattern recognition
- image binarization
- feature vectors