A Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs.

Abdsamad Benkrid Khaled Benkrid Danny Crookes

Published in: FCCM (2003)

Keyphrases

fir filters
hardware implementation
impulse response
field programmable gate array
xilinx virtex
hardware architecture
frequency response
real time
signal processing
frequency domain
efficient implementation
data structure
pattern recognition
data processing