Kiyoshi Oguri

Publication Activity (10 Years)

Years Active: 1990-2019
Publications (10 Years): 14

Top Topics

Design Space Exploration

Object Tracking

Particle Filter

Fpga Implementation

Top Venues

SIGARCH Comput. Archit. News

IEICE Trans. Inf. Syst.

Publications

Naofumi Yoshinaga, Ryo Kamasaka, Yuichiro Shibata, Kiyoshi Oguri
Pipelined FPGA Implementation of a Wave-Front-Fetch Graph Cut System. CISIS (2019)
Ryo Kamasaka, Yuichiro Shibata, Kiyoshi Oguri
An FPGA-oriented Graph Cut Algorithm for Accelerating Stereo Vision. ReConFig (2018)
Taito Manabe, Yuichiro Shibata, Kiyoshi Oguri
FPGA Implementation of a Real-Time Super-Resolution System Using Flips and an RNS-Based CNN. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2018)
Kazuya Uetsuhara, Hiroki Nagayama, Yuichiro Shibata, Kiyoshi Oguri
Discussion on High Level Synthesis FPGA Design of Camera Calibration. CISIS (2018)
Kiyoshi Oguri, Yuichiro Shibata
A new stereo formulation not using pixel and disparity models. CoRR (2018)
Taito Manabe, Yuichiro Shibata, Kiyoshi Oguri
FPGA implementation of a real-time super-resolution system with a CNN based on a residue number system. FPT (2017)
Rie Soejima, Yuichiro Shibata, Kiyoshi Oguri
HLS-Based FPGA Acceleration of Building-Cube Stencil Computation. CISIS (2017)
Theint Theint Thu, Yoshiki Hayashida, Akane Tahara, Yuichiro Shibata, Kiyoshi Oguri
Deep-pipelined FPGA Implementation of Real-time Object Tracking using a Particle Filter. Int. J. Netw. Comput. 7 (2) (2017)
Theint Theint Thu, Jimpei Hamamura, Rie Soejima, Yuichiro Shibata, Kiyoshi Oguri
Comparative Evaluation of FPGA Implementation Alternatives for Real-Time Robust Ellipse Estimation based on RANSAC Algorithm. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (7) (2017)
Ryo Kamasaka, Yuichiro Shibata, Kiyoshi Oguri
FPGA Implementation of A Graph Cut Algorithm For Stereo Vision. HEART (2017)
Akane Tahara, Yoshiki Hayashida, Theint Theint Thu, Yuichiro Shibata, Kiyoshi Oguri
Power Performance Analysis of FPGA-Based Particle Filtering for Realtime Object Tracking. CISIS (2017)
Taito Manabe, Yuichiro Shibata, Kiyoshi Oguri
FPGA implementation of a real-time super-resolution system using a convolutional neural network. FPT (2016)
Akane Tahara, Yoshiki Hayashida, Theint Theint Thu, Yuichiro Shibata, Kiyoshi Oguri
FPGA-based Real-Time Object Tracking Using a Particle Filter with Stream Architecture. CANDAR (2016)
Masahito Oishi, Yoshiki Hayashida, Ryo Fujita, Yuichiro Shibata, Kiyoshi Oguri
A Comparison of Machine Learning Classifiers for FPGA Implementation of HOG-Based Human Detection. ARC (2016)
Keisuke Dohi, Koji Okina, Rie Soejima, Yuichiro Shibata, Kiyoshi Oguri
Performance Modeling of Stencil Computing on a Stream-Based FPGA Accelerator for Efficient Design Space Exploration. IEICE Trans. Inf. Syst. (2) (2015)
Aiko Iwasaki, Yuichiro Shibata, Kiyoshi Oguri, Ryuichi Harasawa
An energy-efficient FPGA-based soft-core processor with a configurable word size ECC arithmetic accelerator. COOL Chips (2015)
Makoto Fujimura, Shuhei Sato, Toshio Higashi, Kiyoshi Oguri
Study of mirror box therapy support system by leap motion. ICCE-TW (2015)
Koji Okina, Rie Soejima, Kota Fukumoto, Yuichiro Shibata, Kiyoshi Oguri
Power Performance Profiling of 3-D Stencil Computation on an FPGA Accelerator for Efficient Pipeline Optimization. SIGARCH Comput. Archit. News 43 (4) (2015)
Kaoru Hamasaki, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri
FPGA Implementation of a Video Based Abnormal Action Detection System with Real-Time Cubic Higher Order Local Auto-Correlation Analysis. ARC (2014)
Aiko Iwasaki, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri, Ryuichi Harasawa
A soft-core processor for finite field arithmetic with a variable word size accelerator. FPL (2014)
Rie Soejima, Koji Okina, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri
A Memory Profiling Framework for Stencil Computation on an FPGA Accelerator with High Level Synthesis. SIGARCH Comput. Archit. News 42 (4) (2014)
Kota Aoki, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri, Takafumi Fujimoto
A Fast Runtime Visualization of a GPU-Based 3D-FDTD Electromagnetic Simulation. CANDAR (2013)
Keisuke Dohi, Kazuhiro Negi, Yuichiro Shibata, Kiyoshi Oguri
FPGA Implementation of Human Detection by HOG Features with AdaBoost. IEICE Trans. Inf. Syst. (8) (2013)
Keisuke Dohi, Kota Fukumoto, Yuichiro Shibata, Kiyoshi Oguri
Performance modeling and optimization of 3-D stencil computation on a stream-based FPGA accelerator. ReConFig (2013)
Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri, Takafumi Fujimoto
Implementation of a GPU-Oriented Absorbing Boundary Condition for 3D-FDTD Electromagnetic Simulation. IEICE Trans. Inf. Syst. (12) (2012)
Takeshi Kakimoto, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri
Performance comparison of GPU programming frameworks with the striped Smith-Waterman algorithm. SIGARCH Comput. Archit. News 40 (5) (2012)
Keisuke Dohi, Yuma Hatanaka, Kazuhiro Negi, Yuichiro Shibata, Kiyoshi Oguri
Deep-pipelined FPGA implementation of ellipse estimation for eye tracking. FPL (2012)
Tomonari Masada, Atsuhiro Takasu, Yuichiro Shibata, Kiyoshi Oguri
Semi-supervised Bibliographic Element Segmentation with Latent Permutations. ICADL (2011)
Tomonari Masada, Atsuhiro Takasu, Yuichiro Shibata, Kiyoshi Oguri
Steering Time-Dependent Estimation of Posteriors with Hyperparameter Indexing in Bayesian Topic Models. PAKDD (1) (2011)
Kazuhiro Negi, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri
Deep pipelined one-chip FPGA implementation of a real-time image-based human detection algorithm. FPT (2011)
Kohei Matsunobu, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri
A discussion on calculating eigenvalues of real symmetric tridiagonal matrices on a GPU. SIGARCH Comput. Archit. News 39 (4) (2011)
Tomonari Masada, Atsuhiro Takasu, Yuichiro Shibata, Kiyoshi Oguri
Clustering Documents with Maximal Substrings. ICEIS (2011)
Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri, Takafumi Fujimoto
GPU implementation and optimization of electromagnetic simulation using the FDTD method for antenna designing. SIGARCH Comput. Archit. News 39 (4) (2011)
Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri
Documents as a Bag of Maximal Substrings - An Unsupervised Feature Extraction for Document Clustering. ICEIS (1) (2011)
Keisuke Dohi, Yuji Yorita, Yuichiro Shibata, Kiyoshi Oguri
Pattern Compression of FAST Corner Detection for Efficient Hardware Implementation. FPL (2011)
Keisuke Dohi, Yuichiro Shibata, Tsuyoshi Hamada, Tomonari Masada, Kiyoshi Oguri, Duncan A. Buell
Implementation of a programming environment with a multithread model for reconfigurable systems. SIGARCH Comput. Archit. News 38 (4) (2010)
Hideki Yamada, Yui Ogawa, Tomonori Ooya, Tomoya Ishimori, Yasunori Osana, Masato Yoshimi, Yuri Nishikawa, Akira Funahashi, Noriko Hiroi, Hideharu Amano, Yuichiro Shibata, Kiyoshi Oguri
Automatic Pipeline Construction Focused on Similarity of Rate Law Functions for an FPGA-based Biochemical Simulator. IPSJ Trans. Syst. LSI Des. Methodol. 3 (2010)
Tomonari Masada, Daiji Fukagawa, Atsuhiro Takasu, Yuichiro Shibata, Kiyoshi Oguri
Modeling Topical Trends over Continuous Time with Priors. ISNN (2) (2010)
Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri
Infinite latent process decomposition. BIBM Workshops (2010)
Yui Ogawa, Tomonori Ooya, Yasunori Osana, Masato Yoshimi, Yuri Nishikawa, Akira Funahashi, Noriko Hiroi, Hideharu Amano, Yuichiro Shibata, Kiyoshi Oguri
A datapath classification method for FPGA-based scientific application accelerator systems. FPT (2010)
Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri
Unsupervised Segmentation of Bibliographic Elements with Latent Permutations. WISE Workshops (2010)
Tomonari Masada, Tsuyoshi Hamada, Yuichiro Shibata, Kiyoshi Oguri
Accelerating Collapsed Variational Bayesian Inference for Latent Dirichlet Allocation with Nvidia CUDA Compatible Devices. IEA/AIE (2009)
Tsuyoshi Hamada, Keigo Nitadori, Khaled Benkrid, Yousuke Ohno, Gentaro Morimoto, Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri, Makoto Taiji
A novel multiple-walk parallel algorithm for the Barnes-Hut treecode on GPUs - towards cost effective, high performance N-body simulation. Comput. Sci. Res. Dev. 24 (1-2) (2009)
Tomonari Masada, Tsuyoshi Hamada, Yuichiro Shibata, Kiyoshi Oguri
Bayesian Multi-topic Microarray Analysis with Hyperparameter Reestimation. ADMA (2009)
Tomonori Ooya, Hideki Yamada, Tomoya Ishimori, Yuichiro Shibata, Yasunori Osana, Kiyoshi Oguri, Masato Yoshimi, Yuri Nishikawa, Akira Funahashi, Noriko Hiroi, Hideharu Amano
Configuring area and performance: Empirical evaluation on an FPGA-based biochemical simulator. FPL (2009)
Tomonari Masada, Atsuhiro Takasu, Tsuyoshi Hamada, Yuichiro Shibata, Kiyoshi Oguri
Bag of Timestamps: A Simple and Efficient Bayesian Chronological Mining. APWeb/WAIM (2009)
Tomonari Masada, Daiji Fukagawa, Atsuhiro Takasu, Tsuyoshi Hamada, Yuichiro Shibata, Kiyoshi Oguri
Dynamic hyperparameter optimization for bayesian topical trend analysis. CIKM (2009)
Kentaro Matsuo, Tsuyoshi Hamada, Masayuki Miyoshi, Yuichiro Shibata, Kiyoshi Oguri
Accelerating Phase Correlation Functions Using GPU and FPGA. AHS (2009)
Hideki Yamada, Yasunori Osana, Tomoya Ishimori, Tomonori Ooya, Masato Yoshimi, Yuri Nishikawa, Akira Funahashi, Noriko Hiroi, Hideharu Amano, Yuichiro Shibata, Kiyoshi Oguri
A Modular Approach to Heterogeneous Biochemical Model Simulation on an FPGA. ReConFig (2009)
Tomoya Ishimori, Hideki Yamada, Yuichiro Shibata, Yasunori Osana, Masato Yoshimi, Yuri Nishikawa, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Kiyoshi Oguri
Pipeline Scheduling with Input Port Constraints for an FPGA-Based Biochemical Simulator. ARC (2009)
Hidenori Matsubayashi, Shinsuke Nino, Toru Aramaki, Yuichiro Shibata, Kiyoshi Oguri
Retrieving 3-d information with FPGA-based stream processing. FPGA (2008)
Sayaka Shida, Yuichiro Shibata, Kiyoshi Oguri, Duncan A. Buell
An optimization method of DMA transfer for a general purpose reconfigurable machine. FPL (2008)
Sayaka Shida, Yuichiro Shibata, Kiyoshi Oguri, Duncan A. Buell
Implementation of a barotropic operator for ocean model simulation using a reconfigurable machine. FPL (2007)
Shinsuke Nino, Takayuki Mori, YoungHun Ko, Yuichiro Shibata, Kiyoshi Oguri
FPGA Implementation of a Statically Reconfigurable Java Environment for Embedded Systems. FPT (2007)
Hideki Yamada, Naoki Iwanaga, Yuichiro Shibata, Yasunori Osana, Masato Yoshimi, Yow Iwaoka, Yuri Nishikawa, Toshinori Kojima, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Hiroaki Kitano, Kiyoshi Oguri
A Combining technique of rate law functions for a cost-effective reconfigurable biological simulator. FPL (2007)
Miwa Miyata, Yuichiro Shibata, Kiyoshi Oguri
An optimization method focusing on fixed-point arithmetic in applications for dynamically reconfigurable processor. Systems and Computers in Japan 38 (14) (2007)
Miwa Miyata, Hideyuki Tsuchiya, Yuichiro Shibata, Kiyoshi Oguri
An Implementation Technique of Multi-Cycled Arithmetic Functions For a Dynamically Reconfigurable Processor. FPL (2006)
Naoki Iwanaga, Yuichiro Shibata, Masato Yoshimi, Yasunori Osana, Yow Iwaoka, Tomonori Fukushima, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Hiroaki Kitano, Kiyoshi Oguri
Efficient Scheduling of Rate Law Functions for ODE-Based Multimodel Biochemical Simulation on an FPGA. FPL (2005)
Shinya Kyusaka, Hayato Higuchi, Taichi Nagamoto, Yuichiro Shibata, Kiyoshi Oguri
Evaluation of Space Allocation Circuits. EUC (2005)
Taichi Nagamoto, Satoshi Yano, Mitsuru Uchida, Yuichiro Shibata, Kiyoshi Oguri
New Area Management Method Based on "Pressure" for Plastic Cell Architecture. EUC (2005)
Takehiro Ito, Yuichiro Shibata, Kiyoshi Oguri
Implementation of the Extended Euclidean Algorithm for the Tate Pairing on FPGA. FPL (2004)
Kiyoshi Oguri, Yuichiro Shibata, Akira Nagoya
Asynchronous Bit-Serial Datapath for Object-Oriented Reconfigurable Architecture PCA. Asia-Pacific Computer Systems Architecture Conference (2003)
Minoru Inamori, Hiroshi Nakada, Ryusuke Konishi, Akira Nagoya, Kiyoshi Oguri
A Method of Mapping Finite State Machine into PCA Plastic Parts. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2002)
Ryusuke Konishi, Hideyuki Ito, Hiroshi Nakada, Akira Nagoya, Norbert Imlig, Tsunemichi Shiozawa, Minoru Inamori, Kouichi Nagami, Kiyoshi Oguri
PCA-1: A Fully Asynchronous, Self-Reconfigurable LSI. ASYNC (2001)
Hiroshi Nakada, Hideyuki Ito, Ryusuke Konishi, Akira Nagoya, Kiyoshi Oguri, Tsunemichi Shiozawa, Norbert Imlig
Self-reorganising systems on VLSI circuits. ISCAS (4) (2001)
Norbert Imlig, Ryusuke Konishi, Tsunemichi Shiozawa, Kiyoshi Oguri, Kouichi Nagami, Hideyuki Ito, Minoru Inamori, Hiroshi Nakada
Communicating logic: an alternative embedded stream processing paradigm. ASP-DAC (2000)
Tsunemichi Shiozawa, Norbert Imlig, Kouichi Nagami, Kiyoshi Oguri, Akira Nagoya, Hiroshi Nakada
An Implementation of Longest Prefix Matching for IP Router on Plastic Cell Architecture. FPL (2000)
Hiroshi Nakada, Kiyoshi Oguri, Norbert Imlig, Minoru Inamori, Ryusuke Konishi, Hideyuki Ito, Kouichi Nagami, Tsunemichi Shiozawa
Plastic Cell Architecture: A Dynamically Reconfigurable Hardware-Based Computer. IPPS/SPDP Workshops (1999)
Hideyuki Ito, Kiyoshi Oguri, Kouichi Nagami, Ryusuke Konishi, Tsunemichi Shiozawa
The Plastic Cell Architecture for Dynamic Reconfigurable Computing. International Workshop on Rapid System Prototyping (1998)
Kouichi Nagami, Kiyoshi Oguri, Tsunemichi Shiozawa, Hideyuki Ito, Ryusuke Konishi
Plastic Cell Architecture: Towards Reconfigurable Computing for General-Purpose. FCCM (1998)
Hiroyuki Yamashita, Toshihiko Suguri, Shingo Kinoshita, Yasushi Okada, Kiyoshi Oguri
Message routing latency-minimizing method in an ASIC design for distributed cooperative communication protocol processing. Systems and Computers in Japan 29 (3) (1998)
Tsunemichi Shiozawa, Kiyoshi Oguri, Kouichi Nagami, Hideyuki Ito, Ryusuke Konishi, Norbert Imlig
A Hardware Implementation of Constraint Satisfaction Problem Based on New Reconfigurable LSI Architecture. FPL (1998)
Kiyoshi Oguri, Norbert Imlig, Hideyuki Ito, Kouichi Nagami, Ryusuke Konishi, Tsunemichi Shiozawa
General-Purpose Computer Architecture Based on Fully Programmable Logic. ICES (1998)
Mitsuteru Yukishita, Kiyoshi Oguri, Tsukasa Kawaoka
Test Synthesis from Behavioral Description Based on Data Transfer Analysis. IEICE Trans. Inf. Syst. (3) (1995)
Akira Nagoya, Yukihiro Nakamura, Kiyoshi Oguri, Ryo Nomura
Multi-Level Optimization for Large Scale ASICS. ICCAD (1990)
Hiroshi Nakada, Naoya Sakurai, Yukiharu Kanayama, Naohisa Ohta, Kiyoshi Oguri
Vector processor design for parallel DSP systems using hierarchical behavioral description based synthesizer. ICCD (1990)