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Rie Soejima
Publication Activity (10 Years)
Years Active: 2014-2017
Publications (10 Years): 2
Top Topics
Comparative Evaluation
Design Space Exploration
Fpga Implementation
High Level Synthesis
Top Venues
SIGARCH Comput. Archit. News
IEICE Trans. Inf. Syst.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
CISIS
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Publications
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Rie Soejima
,
Yuichiro Shibata
,
Kiyoshi Oguri
HLS-Based FPGA Acceleration of Building-Cube Stencil Computation.
CISIS
(2017)
Theint Theint Thu
,
Jimpei Hamamura
,
Rie Soejima
,
Yuichiro Shibata
,
Kiyoshi Oguri
Comparative Evaluation of FPGA Implementation Alternatives for Real-Time Robust Ellipse Estimation based on RANSAC Algorithm.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(7) (2017)
Keisuke Dohi
,
Koji Okina
,
Rie Soejima
,
Yuichiro Shibata
,
Kiyoshi Oguri
Performance Modeling of Stencil Computing on a Stream-Based FPGA Accelerator for Efficient Design Space Exploration.
IEICE Trans. Inf. Syst.
(2) (2015)
Koji Okina
,
Rie Soejima
,
Kota Fukumoto
,
Yuichiro Shibata
,
Kiyoshi Oguri
Power Performance Profiling of 3-D Stencil Computation on an FPGA Accelerator for Efficient Pipeline Optimization.
SIGARCH Comput. Archit. News
43 (4) (2015)
Rie Soejima
,
Koji Okina
,
Keisuke Dohi
,
Yuichiro Shibata
,
Kiyoshi Oguri
A Memory Profiling Framework for Stencil Computation on an FPGA Accelerator with High Level Synthesis.
SIGARCH Comput. Archit. News
42 (4) (2014)