Pattern Compression of FAST Corner Detection for Efficient Hardware Implementation.
Keisuke DohiYuji YoritaYuichiro ShibataKiyoshi OguriPublished in: FPL (2011)
Keyphrases
- hardware implementation
- corner detection
- efficient implementation
- signal processing
- corner detectors
- software implementation
- planar curves
- hardware design
- dedicated hardware
- neural network
- field programmable gate array
- pattern matching
- detection algorithm
- pattern recognition
- document images
- image processing algorithms
- image compression
- low cost
- face images
- denoising