IPSJ Trans. Syst. LSI Des. Methodol.

Keyphrases

Publications

volume 17, 2024

Tohru Ishihara
Message from the Editor-in-Chief. IPSJ Trans. Syst. LSI Des. Methodol. 17 (2024)
Kensuke Iizuka, Kohei Ito, Ryota Yasudo, Hideharu Amano
Power Optimized Design Framework for FPGA Clusters. IPSJ Trans. Syst. LSI Des. Methodol. 17 (2024)
Ryotaro Ohara, Atsushi Fukunaga, Masakazu Taichi, Masaya Kabuto, Riku Hamabe, Masato Ikegawa, Shintaro Izumi, Hiroshi Kawaguchi
A Case Study for Improving Performances of Deep-Learning Processor with MRAM. IPSJ Trans. Syst. LSI Des. Methodol. 17 (2024)
Kazuya Taniguchi, Satoshi Tayu, Atsushi Takahashi, Mathieu Molongo, Makoto Minami, Katsuya Nishioka
Two-layer Bottleneck Channel Track Assignment for Analog VLSI. IPSJ Trans. Syst. LSI Des. Methodol. 17 (2024)
Shota Nakabeppu, Nobuyuki Yamasaki
A Learning-based Control Scheme for MTJ-based Non-volatile Flip-Flops. IPSJ Trans. Syst. LSI Des. Methodol. 17 (2024)
Hansen Wang, Dongju Li, Tsuyoshi Isshiki
A Low-Power Reconfigurable DNN Accelerator for Instruction-Extended RISC-V. IPSJ Trans. Syst. LSI Des. Methodol. 17 (2024)
Tadahiro Kuroda
Slashing IC Power and Democratizing IC Access for the Digital Age. IPSJ Trans. Syst. LSI Des. Methodol. 17 (2024)
Takehiro Kitamura, Takashi Hisakado, Osami Wada, Mahfuzul Islam
Design of Reference-free Flash ADC With On-chip Rank-based Comparator Selection Using Multiple Comparator Groups. IPSJ Trans. Syst. LSI Des. Methodol. 17 (2024)
Yuncheng Zhang, Kenichi Okada
Design of Synthesizable Digital Phase Locked Loops. IPSJ Trans. Syst. LSI Des. Methodol. 17 (2024)

volume 16, 2023

volume 15, 2022

volume 14, 2021

volume 13, 2020

volume 12, 2019

volume 11, 2018