Hiroaki Inoue

Publication Activity (10 Years)

Years Active: 1988-2022
Publications (10 Years): 20

Top Topics

Complex Event Processing

Reconfigurable Hardware

Top Venues

Int. J. Softw. Tools Technol. Transf.

Publications

Cláudio Belo Lourenço, Denis Cousineau, Florian Faissole, Claude Marché, David Mentré, Hiroaki Inoue
Automated formal analysis of temporal properties of Ladder programs. Int. J. Softw. Tools Technol. Transf. 24 (6) (2022)
Hiroaki Inoue, Koji Hukushima, Toshiaki Omori
Estimating Distributions of Parameters in Nonlinear State Space Models with Replica Exchange Particle Marginal Metropolis-Hastings Method. Entropy 24 (1) (2022)
Cláudio Belo Lourenço, Denis Cousineau, Florian Faissole, Claude Marché, David Mentré, Hiroaki Inoue
Automated Verification of Temporal Properties of Ladder Programs. FMICS (2021)
Shunji Shimizu, Masaya Hori, Hiroaki Inoue, Yu Kikuchi, Takuya Kiryu, Fumikazu Miwakeichi
Basic Study to Reduce the Artifact from Brain Activity Data with Auto-regressive Model. HCI (43) (2020)
Hiroaki Inoue, Masaya Hori, Yu Kikuchi, Mayu Maeda, Yusuke Kobayashi, Takuya Kiryu, Toshiya Tsubota, Shunji Shimizu
Basic Study on Measuring Brain Activity for Evaluation Method of Visually Impaired Person's Orientation and Mobility Skills. HCI (49) (2020)
Masaya Hori, Yusuke Kobayashi, Tatsuo Hisaoka, Takuya Kiryu, Yu Kikuchi, Hiroaki Inoue, Shunji Shimizu
Fundamental Study for Analysis of Walking Considering Base of Support for Prevention of Stumble Accident. HCI (49) (2020)
Hiroaki Inoue, Atsushi Igarashi
A type system for first-class layers with inheritance, subtyping, and swapping. Sci. Comput. Program. 179 (2019)
Hiroaki Inoue, Atsushi Igarashi
A Type System for First-Class Layers with Inheritance, Subtyping, and Swapping. CoRR (2019)
Denis Cousineau, David Mentré, Hiroaki Inoue
Automated Deductive Verification for Ladder Programming. F-IDE@FM (2019)
Salita Sombatsiri, Seiya Shibata, Yuki Kobayashi, Hiroaki Inoue, Takashi Takenaka, Takeo Hosomi, Jaehoon Yu, Yoshinori Takeuchi
Parallelism-flexible Convolution Core for Sparse Convolutional Neural Networks on FPGA. IPSJ Trans. Syst. LSI Des. Methodol. 12 (2019)
Hiroaki Inoue, Tomoyuki Aotani, Atsushi Igarashi
ContextWorkflow: A Monadic DSL for Compensable and Interruptible Executions (Artifact). Dagstuhl Artifacts Ser. 4 (3) (2018)
Hiroaki Igarashi, Fumiyo Takano, Takashi Takenaka, Hiroaki Inoue, Tatsuji Moriyoshi
Parallel Rate Distortion Optimized Quantization for 4K Real-time GPU-based HEVC Encoder. VCIP (2018)
Hiroaki Inoue, Tomoyuki Aotani, Atsushi Igarashi
ContextWorkflow: A Monadic DSL for Compensable and Interruptible Executions. ECOOP (2018)
Hiroaki Inoue, Tomoyuki Aotani, Atsushi Igarashi
A DSL for compensable and interruptible executions. REBLS@SPLASH (2017)
Hiroaki Inoue, Atsushi Igarashi
A library-based approach to context-dependent computation with reactive values: suppressing reactions of context-dependent functions using dynamic binding. MODULARITY (Companion) (2016)
Takashi Takenaka, Hiroaki Inoue, Takeo Hosomi, Yuichi Nakamura
FPGA-accelerated complex event processing. VLSIC (2015)
Hiroaki Inoue, Shunji Shimizu, Ishihara Hirotaka, Yuuki Nakata, Hiroyuki Nara, Takeshi Tsuruga, Fumikazu Miwakeichi, Nobuhide Hirai, Senichiro Kikuchi, Satoshi Kato, Eiju Watanabe
Consideration of Measuring Human Physical and Psychological Load Based on Brain Activity. HCI (7) (2015)
Eric Shun Fukuda, Hiroaki Inoue, Takashi Takenaka, Dahoo Kim, Tsunaki Sadahisa, Tetsuya Asai, Masato Motomura
Enhancing Memcached by Caching Its Data and Functionalities at Network Interface. J. Inf. Process. 23 (2) (2015)
Hiroaki Inoue, Atsushi Igarashi
A Sound Type System for Layer Subtyping and Dynamically Activated First-Class Layers. APLAS (2015)
Stewart Denholm, Hiroaki Inoue, Takashi Takenaka, Tobias Becker, Wayne Luk
Network-Level FPGA Acceleration of Low Latency Market Data Feed Arbitration. IEICE Trans. Inf. Syst. (2) (2015)
Hiroaki Inoue, Shunji Shimizu, Hiroyuki Nara, Takeshi Tsuruga, Fumikazu Miwakeichi, Nobuhide Hirai, Senichiro Kikuchi, Eiju Watanabe, Satoshi Kato
Attempts to Quantitative Analyze for the Change of Human Brain Activity with Physical and Psychological Load. HCI (8) (2014)
Eric Shun Fukuda, Hiroaki Inoue, Takashi Takenaka, Dahoo Kim, Tsunaki Sadahisa, Tetsuya Asai, Masato Motomura
Caching memcached at reconfigurable network interface. FPL (2014)
Stewart Denholm, Hiroaki Inoue, Takashi Takenaka, Tobias Becker, Wayne Luk
Low latency FPGA acceleration of market data feed arbitration. ASAP (2014)
Eric Shun Fukuda, Hiroaki Inoue, Takashi Takenaka, Dahoo Kim, Tsunaki Sadahisa, Tetsuya Asai, Masato Motomura
Achieving higher performance of memcached by caching at network interface. FPT (2014)
Kazutoshi Wakabayashi, Takashi Takenaka, Hiroaki Inoue
Mapping complex algorithm into FPGA with High Level Synthesis reconfigurable chips with High Level Synthesis compared with CPU, GPGPU. ASP-DAC (2014)
Shunji Shimizu, Hiroaki Inoue, Hiroyuki Nara, Fumikazu Miwakeichi, Nobuhide Hirai, Senichiro Kikuchi, Eiju Watanabe, Satoshi Kato
Consideration for Interpretation of Brain Activity Pattern during Car Driving Based on Human Movements. HCI (11) (2014)
Hiroaki Inoue, Atsushi Igarashi, Malte Appeltauer, Robert Hirschfeld
Towards Type-Safe JCop: A type system for layer inheritance and first-class layers. COP@ECOOP (2014)
Shunji Shimizu, Hiroaki Inoue, Hiroyuki Nara, Takeshi Tsuruga, Fumikazu Miwakeichi, Nobuhide Hirai, Senichiro Kikuchi, Eiju Watanabe, Satoshi Kato
Basic Study for New Assistive Technology Based on Brain Activity During Car Driving. J. Robotics Mechatronics 26 (2) (2014)
Eric Shun Fukuda, Hideyuki Kawashima, Hiroaki Inoue, Taro Fujii, Koichiro Furuta, Tetsuya Asai, Masato Motomura
C-Based Adaptive Stream Processing on Dynamically Reconfigurable Hardware: A Case Study on Window Join. ARC (2013)
Eric Shun Fukuda, Hideyuki Kawashima, Hiroaki Inoue, Tetsuya Asai, Masato Motomura
Exploiting hardware reconfigurability on window join. HPCS (2013)
Shunji Shimizu, Hiroaki Inoue
Human Support System for Elderly People in Daily Life. HCI (14) (2013)
Hiroaki Inoue, Takashi Takenaka, Masato Motomura
C-Based Complex Event Processing on Reconfigurable Hardware. IEEE Trans. Very Large Scale Integr. Syst. 21 (5) (2013)
Hiroaki Inoue, Shunji Shimizu
Fundamental Study for New Evaluation Method Based on Physical and Psychological Load in Human Movement. HCI (28) (2013)
Stewart Denholm, Hiroaki Inoue, Takashi Takenaka, Wayne Luk
Application-specific customisation of market data feed arbitration. FPT (2013)
Hiroaki Inoue, Hiroshi Yoshida
Development of Hybrid Hydraulic Excavators. Int. J. Autom. Technol. 6 (4) (2012)
Masamichi Takagi, Takashi Takenaka, Hiroaki Inoue
Dynamic query switching for complex event processing on FPGAs. FPL (2012)
Takashi Takenaka, Masamichi Takagi, Hiroaki Inoue
A scalable complex event processing framework for combination of SQL-based continuous queries and C/C++ functions. FPL (2012)
Shunji Shimizu, Hiroyuki Nara, Fumikazu Miwakeichi, Senichiro Kikuchi, Hiroaki Inoue, Noboru Takahashi, Nobuhide Hirai, Eiju Watanabe, Satoshi Kato
Fundamental study to new assist system for wheel chair based on brain activity during car driving. BMEI (2012)
Noboru Takahashi, Shunji Shimizu, Yukihiro Hirata, Hiroyuki Nara, Hiroaki Inoue, Nobuhide Hirai, Senichiro Kikuchi, Eiju Watanabe, Satoshi Kato
Basic Study of Analysis of Human Brain Activities during Car Driving. HCI (11) (2011)
Hiroaki Inoue, Takashi Takenaka, Masato Motomura
20Gbps C-Based Complex Event Processing. FPL (2011)
Shunji Shimizu, Noboru Takahashi, Hiroaki Inoue, Hiroyuki Nara, Fumikazu Miwakeichi, Nobuhide Hirai, Senichiro Kikuchi, Eiju Watanabe, Satoshi Kato
Basic study for a new assistive system based on brain activity associated with spatial perception task during car driving. ROBIO (2011)
Shunji Shimizu, Noboru Takahashi, Hiroyuki Nara, Hiroaki Inoue, Yukihiro Hirata
Fundamental Study for Human Brain Activity Based on the Spatial Cognitive Task. Brain Informatics (2011)
Hiroaki Inoue, Kazuhisa Ishizaka, Junji Sakai
Greening of Many-Core Processors in Network-Optimized Computing. GLOBECOM (2011)
Hiroaki Inoue, Junya Yamada, Hideyuki Yoneda, Katsumi Togawa, Masato Motomura, Koichiro Furuta
Test compression for dynamically reconfigurable processors. ACM Trans. Reconfigurable Technol. Syst. 4 (4) (2011)
Teemu Koponen, Martín Casado, Natasha Gude, Jeremy Stribling, Leon Poutievski, Min Zhu, Rajiv Ramanathan, Yuichiro Iwata, Hiroaki Inoue, Takayuki Hama, Scott Shenker
Onix: A Distributed Control Platform for Large-scale Production Networks. OSDI (2010)
Hiroaki Inoue, Junya Yamada, Hideyuki Yoneda, Katsumi Togawa, Koichiro Furuta
Test Compression for Dynamically Reconfigurable Processors. FPL (2010)
Hiroaki Inoue, Junji Sakai, Masato Edahiro
A robust seamless communication architecture for next-generation mobile terminals on multi-CPU SoCs. ACM Trans. Embed. Comput. Syst. 9 (3) (2010)
Hiroaki Inoue
A Multi-Core Processor Platform for Open Embedded Systems CoRR (2010)
Hiroaki Inoue, Tsuyoshi Abe, Kazuhisa Ishizaka, Junji Sakai, Masato Edahiro
Dynamic security domain scaling on embedded symmetric multiprocessors. ACM Trans. Design Autom. Electr. Syst. 14 (2) (2009)
Hiroaki Inoue, Junji Sakai, Sunao Torii, Masato Edahiro
FIDES: An advanced chip multiprocessor platform for secure next generation mobile terminals. ACM Trans. Embed. Comput. Syst. 8 (1) (2008)
Hiroaki Inoue, Junji Sakai, Masato Edahiro
Processor virtualization for secure mobile terminals. ACM Trans. Design Autom. Electr. Syst. 13 (3) (2008)
Hiroaki Inoue, Yanjing Li, Subhasish Mitra
VAST: Virtualization-Assisted Concurrent Autonomous Self-Test. ITC (2008)
Junji Sakai, Hiroaki Inoue, Sunao Torii, Masato Edahiro
Multitasking Parallel Method for High-End Embedded Appliances. IEEE Micro 28 (5) (2008)
Hiroaki Inoue, Masato Edahiro, Junji Sakai
Towards scalable and secure execution platform for embedded systems. ASP-DAC (2007)
Hiroaki Inoue, Akihisa Ikeno, Tsuyoshi Abe, Junji Sakai, Masato Edahiro
Dynamic security domain scaling on symmetric multiprocessors for future high-end embedded systems. CODES+ISSS (2007)
Hiroaki Inoue, Akihisa Ikeno, Masaki Kondo, Junji Sakai, Masato Edahiro
VIRTUS: a new processor virtualization architecture for security-oriented next-generation mobile terminals. DAC (2006)
Hiroaki Inoue, Akihisa Ikeno, Masaki Kondo, Junji Sakai, Masato Edahiro
FIDES: an advanced chip multiprocessor platform for secure next generation mobile terminals. CODES+ISSS (2005)
Hiroaki Inoue, Hitoshi Nakamura, Kenichi Morosawa, Yoshimitsu Sasaki, Toshio Katsuyama, Naoki Chinone
An 8 mm length nonblocking 4×4 optical switch array. IEEE J. Sel. Areas Commun. 6 (7) (1988)