Kotaro Shimamura

Publication Activity (10 Years)

Years Active: 1994-2024
Publications (10 Years): 4

Top Topics

Measurement Data

Gradient Boosting

Top Venues

IPSJ Trans. Syst. LSI Des. Methodol.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Kotaro Shimamura, Shinya Takamaeda-Yamazaki
FS-Boost: Communication-Efficient Federated Subtree-Based Gradient Boosting Decision Trees. CCNC (2024)
Kotaro Shimamura, Takeshi Takehara, Naohiro Ikeda
Measurement Results of Real Circuit Delay Degradation under Realistic Workload. IPSJ Trans. Syst. LSI Des. Methodol. 16 (2023)
Yusuke Kanno, Tadanobu Toba, Kotaro Shimamura, Nobuyasu Kanekawa
Design Method for Online Totally Self-Checking Comparators Implementable on FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 28 (3) (2020)
Kotaro Shimamura, Naohiro Ikeda
Real Circuit Delay Measurement Method by Variable Frequency Operation with On-Chip Fine Resolution Oscillator. IPSJ Trans. Syst. LSI Des. Methodol. 13 (2020)
Yasuo Sato, Seiji Kajihara, Tomokazu Yoneda, Kazumi Hatayama, Michiko Inoue, Yukiya Miura, Satosni Untake, Takumi Hasegawa, Motoyuki Sato, Kotaro Shimamura
DART: Dependable VLSI test architecture and its implementation. ITC (2012)
Kotaro Shimamura, Takeshi Takehara, Yosuke Shima, Kunihiko Tsunedomi
A Single-Chip Fail-Safe Microprocessor with Memory Data Comparison Feature. PRDC (2006)
Kotaro Shimamura, Yuichiro Morita, Yoshitaka Takahashi, Takashi Hotta, Shigeta Ueda, Mikiya Nohara, Mitsuyasu Kido, Seji Tanaka, Kazuhiro Imaie, Koji Sakamoto, Tatsuhito Nakajima
A Triple Redundant Controller which Adopts the Time-Sharing Fault Recovery Method and its Application to a Power Converter Controller. IEEE Real Time Technology and Applications Symposium (1998)
Fumio Murabayashi, Tatsumi Yamauchi, Hiromichi Yamada, Takahiro Nishiyama, Kotaro Shimamura, Shigeya Tanaka, Takashi Hotta, Teruhisa Shimizu, Hideo Sawamoto
2.5 V CMOS circuit techniques for a 200 MHz superscalar RISC processor. IEEE J. Solid State Circuits 31 (7) (1996)
Kotaro Shimamura, Shigeya Tanaka, Tetsuya Shimomura, Takashi Hotta, Eiki Kamada, Hideo Sawamoto, Teruhisa Shimizu, Kisaburo Nakazawa
A superscalar RISC processor with pseudo vector processing feature. ICCD (1995)
Shigeya Tanaka, Takashi Hotta, Fumio Murabayashi, Hiromichi Yamada, Shoji Yoshida, Kotaro Shimamura, Koyo Katsura, Tadaaki Bandoh, Koichi Ikeda, Kenji Matsubara, Kouji Saitou, Tetsuo Nakano, Teruhisa Shimizu, Ryuichi Satomura
A 120-MHz BiCMOS superscalar RISC processor. IEEE J. Solid State Circuits 29 (4) (1994)