Hideo Sawamoto

Publication Activity (10 Years)

Years Active: 1995-2004
Publications (10 Years): 0

Publications

Masaji Kume, Katsutoshi Uehara, Minoru Itakura, Hideo Sawamoto, Toru Kobayashi, Masatoshi Hasegawa, Hideki Hayashi
Programmable At-Speed Array and Functional BIST for Embedded DRAM LSI. ITC (2004)
Shoji Yoshida, Shigeya Tanaka, Kotaro Matsuo, Takashi Hotta, Hideo Sawamoto, Teruhisa Shimizu
Instruction fetch and dispatch scheme with flag-in-cache/in-IBR. Systems and Computers in Japan 29 (4) (1998)
Fumio Murabayashi, Tatsumi Yamauchi, Hiromichi Yamada, Takahiro Nishiyama, Kotaro Shimamura, Shigeya Tanaka, Takashi Hotta, Teruhisa Shimizu, Hideo Sawamoto
2.5 V CMOS circuit techniques for a 200 MHz superscalar RISC processor. IEEE J. Solid State Circuits 31 (7) (1996)
Kotaro Shimamura, Shigeya Tanaka, Tetsuya Shimomura, Takashi Hotta, Eiki Kamada, Hideo Sawamoto, Teruhisa Shimizu, Kisaburo Nakazawa
A superscalar RISC processor with pseudo vector processing feature. ICCD (1995)