IEEE J. Solid State Circuits

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Publications

volume 59, number 2, 2024

Xin Ming, Jian-Jun Kuang, Xin-Ce Gong, Jie Zhang, Zhuo Wang, Bo Zhang
An NMOS LDO With TM-MOS and Dynamic Clamp Technique Handling Up To Sub-10-μs Short-Period Load Transient. IEEE J. Solid State Circuits 59 (2) (2024)
Chi-Wa U, Man-Kay Law, Rui Paulo Martins, Chi-Seng Lam
Sub-μW Auto-Calibration Bandgap Voltage Reference With 1σ Inaccuracy of ± 0.12% Within - 40°C to 120°C. IEEE J. Solid State Circuits 59 (2) (2024)
Sheng-Yu Peng, I-Chun Liu, Yi-Heng Wu, Ting-Ju Lin, Chun-Jui Chen, Xiu-Zhu Li, Yong-Qi Cheng, Pin-Han Lin, Kuo-Hsuan Hung, Yu Tsao
An SRAM-Based Reconfigurable Cognitive Computation Matrix for Sensor Edge Applications. IEEE J. Solid State Circuits 59 (2) (2024)
Li Wang, Zhao Zhang, Can Wang, Rehan Azmat, Weimin Shi, C. Patrick Yue
A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM-4 Receiver With a Jitter Compensation CDR. IEEE J. Solid State Circuits 59 (2) (2024)
Tianxiang Qu, Peizhuo Wang, Liangbo Lei, Zhiliang Hong, Jiawei Xu
A 136-GΩ Input-Impedance Active Electrode for Non-Contact Biopotential Signals Monitoring. IEEE J. Solid State Circuits 59 (2) (2024)
Haihua Li, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
A 12-/13.56-MHz Crystal Oscillator With Binary-Search-Assisted Two-Step Injection Achieving 5.0-nJ Startup Energy and 45.8-μs Startup Time. IEEE J. Solid State Circuits 59 (2) (2024)
Fei Tan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2.91-nJ/Decision Keyword-Spotting (KWS) Chip Featuring an Always-Retention 5T-SRAM in 28-nm CMOS. IEEE J. Solid State Circuits 59 (2) (2024)
Juyeop Kim, Yongwoo Jo, Hangi Park, Taeho Seong, Younghyun Lim, Jaehyouk Choi
A 12.8-15.0-GHz Low-Jitter Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancellation. IEEE J. Solid State Circuits 59 (2) (2024)
Christian Elgaard, Mustafa Özen, Eric Westesson, Ahmed Mahmoud, Florent Torres, Shakila Bint Reyaz, Therese Forsberg, Rehman Akbar, Hans Hagberg, Henrik Sjöland
Efficient Wideband mmW Transceiver Front End for 5G Base Stations in 22-nm FD-SOI CMOS. IEEE J. Solid State Circuits 59 (2) (2024)
Jonas Pelgrims, Kris Myny, Wim Dehaene
An Ultrasonic Driver Array in Metal-Oxide Thin-Film Technology Using a Hybrid TFT-Si DLL Locking Architecture. IEEE J. Solid State Circuits 59 (2) (2024)
Kyeongwon Jeong, Sohmyung Ha, Minkyu Je
A 15.4-ENOB, Fourth-Order Truncation-Error-Shaping NS-SAR-Nested ΔΣ Modulator With Boosted Input Impedance and Range for Biosignal Acquisition. IEEE J. Solid State Circuits 59 (2) (2024)
Arindam Mishra, Wei Zhu, Bernhard Wicht, Valentijn De Smedt
A Dual-Inductor Ladder Buck Converter for Li-Ion Battery-Operated Sub-Volt SoCs. IEEE J. Solid State Circuits 59 (2) (2024)
Milad Moosavifar, Jaeho Im, David D. Wentzloff
An Interference-Resilient Bit-Level Duty-Cycled ULP Receiver Leveraging a Dual-Chirp Modulation. IEEE J. Solid State Circuits 59 (2) (2024)
Fu-Bin Yang, Dao-Han Yao, Po-Hung Chen
A Quad-Mode Structure-Reconfigurable Regulating Rectifier With Shared-Inductor DC-DC Energy Recycling in a Wireless Power Receiver. IEEE J. Solid State Circuits 59 (2) (2024)
Tao Wang, Jieyang Li, Di Hua, Liangbo Lei, Peng Cao, Peng Xu, Jiawei Xu, Zhiliang Hong
A Fully Integrated Digital Polar Transmitter With Single-Ended Doherty PA and DLL-Based Three-Segment Hybrid DTC in 28 nm CMOS. IEEE J. Solid State Circuits 59 (2) (2024)
Dennis Sylvester
New Associate Editor. IEEE J. Solid State Circuits 59 (2) (2024)
Guansheng Lv, Wenhua Chen, Long Chen, Fadhel M. Ghannouchi, Zhenghe Feng
A 4.9-7.1-GHz High-Efficiency Post-Matching GaN Front-End Module for Wi-Fi 7 Application. IEEE J. Solid State Circuits 59 (2) (2024)
Liang Gao, Chi Hou Chan
A 144-Element Beam-Steerable Source Array With 9.1-dBm Radiated Power and 30.8-dBm Lensless EIPR at 675 GHz. IEEE J. Solid State Circuits 59 (2) (2024)
Dennis Sylvester
New Associate Editor. IEEE J. Solid State Circuits 59 (2) (2024)
Chuxiong Lin, Weifeng He, Yanan Sun, Lin Shao, Bo Zhang, Jun Yang, Mingoo Seok
A Metastability Risk Prediction and Mitigation Technique for Clock-Domain Crossing With Single-Stage Synchronizer in Near-Threshold-Voltage Multivoltage/ Frequency-Domain Network-on-Chip. IEEE J. Solid State Circuits 59 (2) (2024)
Heyi Li, Kaixuan Du, Yuanxin Bao, Yanchi Dong, Jiayoon Ru, Han Xiao, Hao Zhang, Zhixuan Wang, Yi Zhong, Linxiao Shen, Le Ye, Ru Huang
Stacked Standard-CMOS Humidity Sensor Using a Charge-Redistribution Correlated Level Shifting Floating Inverter Amplifier and a VCO-Based Zoom CDC. IEEE J. Solid State Circuits 59 (2) (2024)
Chia-Chi Kuo, Rihito Kuroda
A 134×132 4-Tap CMOS Indirect Time-of-Flight Range Imager Using In-Pixel Memory Array With 10 Kfps High-Speed Mode and High Precision Mode. IEEE J. Solid State Circuits 59 (2) (2024)
Yannick M. Hopf, Djalma Simões dos Santos, Boudewine W. Ossenkoppele, Mehdi Soozande, Emile Noothout, Zu-Yao Chang, Chao Chen, Hendrik J. Vos, Johan G. Bosch, Martin D. Verweij, Nico de Jong, Michiel A. P. Pertijs
A Pitch-Matched High-Frame-Rate Ultrasound Imaging ASIC for Catheter-Based 3-D Probes. IEEE J. Solid State Circuits 59 (2) (2024)

volume 59, number 3, 2024